A study of leakage and noise tolerant wide fan-in OR logic domino circuits
In recent years, wide fan-in OR logic domino circuits have become essential parts to
implement resister files, PLA, L1 latches, superscalar microprocessors, wide Mux/De-Mux …
implement resister files, PLA, L1 latches, superscalar microprocessors, wide Mux/De-Mux …
Reduction of variation and leakage in wide fan-in OR Logic domino gate
In this paper, a novel domino gate is proposed to decrease the process variability and
leakage current with enhanced noise margin for wide fan-in OR logic. The process variation …
leakage current with enhanced noise margin for wide fan-in OR logic. The process variation …
Design of energy efficient domino logic circuit using lector technique
Calculating power and delay in VLSI circuits are two main challenges in designing CMOS
VLSI circuits. The manuscript proposes a lector technique-based foot-driven stack transistor …
VLSI circuits. The manuscript proposes a lector technique-based foot-driven stack transistor …
New partitioned domino circuit for power-efficient wide gates
M Asyaei - Integration, 2023 - Elsevier
In this article, a new domino circuit is presented to decrease the power consumption of wide
gates without considerable performance and robustness degradation. The suggested circuit …
gates without considerable performance and robustness degradation. The suggested circuit …
An Improved Pseudo-Domino Technique for Low-Power Applications
S Pandey, M Kumar - VLSI, Microwave and Wireless Technologies: Select …, 2022 - Springer
In the era of nanometer technology, power consumption is the most important factor in digital
circuit systems. In this paper, power consumption in a pseudo-domino logic-based buffer …
circuit systems. In this paper, power consumption in a pseudo-domino logic-based buffer …
[PDF][PDF] CMOS DESIGN OF LOW POWER LOGIC CIRCUIT FOR NOISE TOLERANT DOMINO LOGIC
M Jayadharani, Z Amrin, SK Mydhili, C Venkatesh - 2023 - researchgate.net
The Insistence of imminent computing, as well as the provocation of the nanometre-era of
VLSI design necessitate new digital connection styles that are at the same time high …
VLSI design necessitate new digital connection styles that are at the same time high …
[PDF][PDF] Curvelet Transform Based Hyperspectral Image Compression with Listless Set Partitioned Compression Algorithm for Unmanned Aerial Vehicle Image Sensor
VK Tripathi, S Bajpai - researchgate.net
Over the past several years, we have witnessed remarkable progress in hyperspectral (HS)
images taken by unmanned aerial vehicles. The HS image is very high in spectral resolution …
images taken by unmanned aerial vehicles. The HS image is very high in spectral resolution …
Leakage tolerant Wide OR Domino Gate with Modified Keeper Controlling Network
S Garg, S Goyal, P Nawale, R Kaur… - 2019 IEEE 16th India …, 2019 - ieeexplore.ieee.org
Domino circuits are area-efficient and have advantages of high speed. The performance of
domino circuits, however, is affected by leakage in sub-micron regime and various keeper …
domino circuits, however, is affected by leakage in sub-micron regime and various keeper …
12 A Study of Leakage and
NT Wide, FORL Domino - Nanotechnology: Device Design and …, 2022 - books.google.com
Wide fan-in OR domino circuits are widely used to perform many operations in signal
processors and microprocessors [1–10]. These operations must be performed within a few …
processors and microprocessors [1–10]. These operations must be performed within a few …