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A survey of fault-tolerance algorithms for reconfigurable nano-crossbar arrays
Nano-crossbar arrays have emerged as a promising and viable technology to improve
computing performance of electronic circuits beyond the limits of current CMOS. Arrays offer …
computing performance of electronic circuits beyond the limits of current CMOS. Arrays offer …
[HTML][HTML] On orthogonal ray graphs
AMS Shrestha, S Tayu, S Ueno - Discrete Applied Mathematics, 2010 - Elsevier
An orthogonal ray graph is an intersection graph of horizontal and vertical rays (half-lines) in
the xy-plane. An orthogonal ray graph is a 2-directional orthogonal ray graph if all the …
the xy-plane. An orthogonal ray graph is a 2-directional orthogonal ray graph if all the …
A new memetic algorithm with fitness approximation for the defect-tolerant logic map** in crossbar-based nanoarchitectures
B Yuan, B Li, T Weise, X Yao - IEEE Transactions on …, 2013 - ieeexplore.ieee.org
The defect-tolerant logic map** (DTLM), which has been proved to be an NP-complete
combinatorial search problem, is a key step for logic implementation in emerging crossbar …
combinatorial search problem, is a key step for logic implementation in emerging crossbar …
A fast extraction algorithm for defect-free subcrossbar in nanoelectronic crossbar
B Yuan, B Li - ACM Journal on Emerging Technologies in Computing …, 2014 - dl.acm.org
Due to the super scale, high defect density, and per-chip designing paradigm of emerging
nanoelectronics, the runtime of the algorithms for defect-tolerant design is of vital importance …
nanoelectronics, the runtime of the algorithms for defect-tolerant design is of vital importance …
[PDF][PDF] Reconfigurable nano-crossbar architectures
Reconfigurable computing, in particular based on field-programmable gate arrays (FPGAs),
is becoming increasingly attractive for a variety of applications [1],[2]. This increase in …
is becoming increasingly attractive for a variety of applications [1],[2]. This increase in …
Toward future systems with nanoscale devices: Overcoming the reliability challenge
Nanoelectronic devices are envisioned to deliver major improvements in device density,
power, and performance, but turning such promises into reality hinges on overcoming the …
power, and performance, but turning such promises into reality hinges on overcoming the …
Liquid silicon: A data-centric reconfigurable architecture enabled by rram technology
This paper presents a data-centric reconfigurable architecture, namely Liquid Silicon,
enabled by emerging non-volatile memory, ie, RRAM. Compared to the heterogeneous …
enabled by emerging non-volatile memory, ie, RRAM. Compared to the heterogeneous …
On two problems of nano-PLA design
The logic map** problem and the problem of finding a largest sub-crossbar with no
defects in a nano-crossbar with nonprogrammable-crosspoint defects and disconnected …
defects in a nano-crossbar with nonprogrammable-crosspoint defects and disconnected …
Intersection dimension of bipartite graphs
We introduce a concept of intersection dimension of a graph with respect to a graph class.
This generalizes Ferrers dimension, boxicity, and poset dimension, and leads to interesting …
This generalizes Ferrers dimension, boxicity, and poset dimension, and leads to interesting …
Defect-aware nanocrossbar logic map** through matrix canonization using two-dimensional radix sort
Nanocrossbars (ie, nanowire crossbars) offer extreme logic densities but come with very
high defect rates; stuck-open/closed, broken nanowires. Achieving reasonable yield and …
high defect rates; stuck-open/closed, broken nanowires. Achieving reasonable yield and …