PN junction optoelectronic device for ionizing dopants by field effect
IC Robin, H Bono - US Patent 9,601,542, 2017 - Google Patents
An optoelectronic device comprising a mesa structure including: a first and a second
semiconductor portions forming a pn junction, a first electrode electrically connected to the …
semiconductor portions forming a pn junction, a first electrode electrically connected to the …
GaN lateral vertical HJFET with source-P block contact
G Ye - US Patent 10,535,740, 2020 - Google Patents
(57) ABSTRACT A vertical JFET is provided. The JFET is mixed with lateral channel
structure and p-GaN gate structure. The JFET has an improved barrier layer for p-GaN block …
structure and p-GaN gate structure. The JFET has an improved barrier layer for p-GaN block …
Electronic device using group III nitride semiconductor and its fabrication method
T Hashimoto, D Ueda - US Patent 10,134,883, 2018 - Google Patents
The present invention discloses an electronic device formed of a group III nitride. In one
embodiment, a substrate is fabricated by the ammonothermal method and a drift layer is …
embodiment, a substrate is fabricated by the ammonothermal method and a drift layer is …
Electronic device using group III nitride semiconductor and its fabrication method
T Hashimoto, D Ueda - US Patent 10,134,884, 2018 - Google Patents
The present invention discloses an electronic device formed of a group III nitride. In one
embodiment, a substrate is fabricated by the ammonothermal method and a drift layer is …
embodiment, a substrate is fabricated by the ammonothermal method and a drift layer is …
Electronic device using group III nitride semiconductor and its fabrication method
T Hashimoto, D Ueda - US Patent 10,141,435, 2018 - Google Patents
The present invention discloses an electronic device formed of a group III nitride. In one
embodiment, a substrate is fabricated by the ammonothermal method and a drift layer is …
embodiment, a substrate is fabricated by the ammonothermal method and a drift layer is …
Semiconductor device and method of manufacturing semiconductor device
M Haneda - US Patent 11,515,351, 2022 - Google Patents
There is provided a semiconductor device in which the inter-wiring capacitance of wiring
lines provided in any layout is further reduced. A semiconductor device (1) including: a first …
lines provided in any layout is further reduced. A semiconductor device (1) including: a first …
Semiconductor device
S Kaneko, H Yamagiwa, A Ikoshi, M Kuroda… - US Patent …, 2017 - Google Patents
In a semiconductor device in the present disclosure, a first nitride semiconductor layer has a
two-dimensional electron gas channel in a vicinity of an interface with a second nitride …
two-dimensional electron gas channel in a vicinity of an interface with a second nitride …
Vertical transport FETs having a gradient threshold voltage
Vertical transport field effect transistors (FETs) having improved device performance are
provided. Notably, verti cal transport FETs having a gradient threshold voltage are provided …
provided. Notably, verti cal transport FETs having a gradient threshold voltage are provided …
GaN lateral vertical JFET with regrown channel and dielectric gate
G Ye - US Patent 10,971,587, 2021 - Google Patents
(57) ABSTRACT A vertical JFET is provided. The JFET is mixed with lateral channel
structure and p-GaN gate structure. The JFET has a N+ implant source region. In one …
structure and p-GaN gate structure. The JFET has a N+ implant source region. In one …
Vertical transport FETs having a gradient threshold voltage
Vertical transport field effect transistors (FETs) having improved device performance are
provided. Notably, verti cal transport FETs having a gradient threshold voltage are provided …
provided. Notably, verti cal transport FETs having a gradient threshold voltage are provided …