Recent research development and new challenges in analog layout synthesis
Analog and mixed-signal integrated circuits play an important role in many modern
emerging system-on-chip (SoC) design applications. With the expansion of the markets of …
emerging system-on-chip (SoC) design applications. With the expansion of the markets of …
A novel analog physical synthesis methodology integrating existent design expertise
Analog layout design has been a manual, time-consuming, and error-prone task for
decades. To speed up layout design time for a new design, analog layout designers prefer …
decades. To speed up layout design time for a new design, analog layout designers prefer …
EA-based LDE-aware fast analog layout retargeting with device abstraction
X Dong, L Zhang - IEEE Transactions on Very Large Scale …, 2018 - ieeexplore.ieee.org
As the technology node continuously scales down, layout-dependent effects (LDEs) have
been significantly affecting the threshold voltage and mobility of MOSFET transistors and …
been significantly affecting the threshold voltage and mobility of MOSFET transistors and …
Analog layout synthesis with knowledge mining
To reduce layout design time, analog layout designers prefer referring to legacy designs and
layouts rather than starting from scratch, or thoroughly applying placement and routing tools …
layouts rather than starting from scratch, or thoroughly applying placement and routing tools …
Exploring feasibilities of symmetry islands and monotonic current paths in slicing trees for analog placement
Although modern analog placement algorithms aimed to minimize area and wirelength
while satisfying symmetry, proximity, and other placement constraints, the generated layout …
while satisfying symmetry, proximity, and other placement constraints, the generated layout …
Performance-driven analog placement considering monotonic current paths
PH Wu, MPH Lin, YR Chen, BS Chou… - Proceedings of the …, 2012 - dl.acm.org
Although modern analog placement algorithms aimed to minimize area and wirelength
while satisfying symmetry, proximity, and other placement constraints, the generated layout …
while satisfying symmetry, proximity, and other placement constraints, the generated layout …
Configurable analog routing methodology via technology and design constraint unification
In this paper, we present a novel configurable analog routing methodology for more efficient
analog layout automation. By the help of OpenAccess constraint group format, the …
analog layout automation. By the help of OpenAccess constraint group format, the …
A fast prototy** framework for analog layout migration with planar preservation
Analog layout generation in the advanced CMOS design is challenging by its increasing
layout constraints and performance requirements. This situation becomes more intricate by …
layout constraints and performance requirements. This situation becomes more intricate by …
Performance-preserved analog routing methodology via wire load reduction
HY Chi, HY Tseng, CNJ Liu… - 2018 23rd Asia and …, 2018 - ieeexplore.ieee.org
Analog layout automation is a popular research direction in recent years to raise the design
productivity. However, the research on this topic is still not well accepted by analog …
productivity. However, the research on this topic is still not well accepted by analog …
LASER: layout-aware analog synthesis environment on laker
YC Liao, YL Chen, XT Cai, CN Liu… - Proceedings of the 23rd …, 2013 - dl.acm.org
In modern technology, layout effects have more and more impacts on circuit performance.
However, most of the existing analog automation tools consider the circuit sizing and layout …
However, most of the existing analog automation tools consider the circuit sizing and layout …