A full spectrum of computing-in-memory technologies
Computing in memory (CIM) could be used to overcome the von Neumann bottleneck and to
provide sustainable improvements in computing throughput and energy efficiency …
provide sustainable improvements in computing throughput and energy efficiency …
Recent progress of integrated circuits and optoelectronic chips
Integrated circuits (ICs) and optoelectronic chips are the foundation stones of the modern
information society. The IC industry has been driven by the so-called “Moore's law” in the …
information society. The IC industry has been driven by the so-called “Moore's law” in the …
[HTML][HTML] An analog-AI chip for energy-efficient speech recognition and transcription
Abstract Models of artificial intelligence (AI) that have billions of parameters can achieve
high accuracy across a range of tasks,, but they exacerbate the poor energy efficiency of …
high accuracy across a range of tasks,, but they exacerbate the poor energy efficiency of …
A 5-nm 254-TOPS/W 221-TOPS/mm2 Fully-Digital Computing-in-Memory Macro Supporting Wide-Range Dynamic-Voltage-Frequency Scaling and Simultaneous …
H Fujiwara, H Mori, WC Zhao… - … Solid-State Circuits …, 2022 - ieeexplore.ieee.org
Computing-in-memory (CIM) is being widely explored to minimize power consumption in
data movement and multiply-and-accumulate (MAC) for edge-AI devices. Although most …
data movement and multiply-and-accumulate (MAC) for edge-AI devices. Although most …
Cnn partitioning and offloading for vehicular edge networks in web3
Web3, an emerging blockchain-based decentralized network, grants users ownership and
enhances the collaboration among devices under monitoring. Benefiting from …
enhances the collaboration among devices under monitoring. Benefiting from …
A 28nm 1Mb time-domain computing-in-memory 6T-SRAM macro with a 6.6 ns latency, 1241GOPS and 37.01 TOPS/W for 8b-MAC operations for edge-AI devices
PC Wu, JW Su, YL Chung, LY Hong… - … Solid-State Circuits …, 2022 - ieeexplore.ieee.org
SRAM-based computing in memory (SRAM-CIM) is an attractive approach to improve the
energy efficiency (EF) of edge-AI devices performing multiply-and-accumulate (MAC) …
energy efficiency (EF) of edge-AI devices performing multiply-and-accumulate (MAC) …
A 1.041-Mb/mm2 27.38-TOPS/W Signed-INT8 Dynamic-Logic-Based ADC-less SRAM Compute-in-Memory Macro in 28nm with Reconfigurable Bitwise Operation for …
Advanced intelligent embedded systems perform cognitive tasks with highly-efficient vector-
processing units for deep neural network (DNN) inference and other vector-based signal …
processing units for deep neural network (DNN) inference and other vector-based signal …
HERMES-Core—A 1.59-TOPS/mm2 PCM on 14-nm CMOS In-Memory Compute Core Using 300-ps/LSB Linearized CCO-Based ADCs
We present a 256 256 in-memory compute (IMC) core designed and fabricated in 14-nm
CMOS technology with backend-integrated multi-level phase change memory (PCM). It …
CMOS technology with backend-integrated multi-level phase change memory (PCM). It …
A 28nm 29.2 TFLOPS/W BF16 and 36.5 TOPS/W INT8 reconfigurable digital CIM processor with unified FP/INT pipeline and bitwise in-memory booth multiplication for …
Many computing-in-memory (CIM) processors have been proposed for edge deep learning
(DL) acceleration. They usually rely on analog CIM techniques to achieve high-efficiency NN …
(DL) acceleration. They usually rely on analog CIM techniques to achieve high-efficiency NN …
A 65-nm 8T SRAM compute-in-memory macro with column ADCs for processing neural networks
In this work, we present a novel 8T static random access memory (SRAM)-based compute-in-
memory (CIM) macro for processing neural networks with high energy efficiency. The …
memory (CIM) macro for processing neural networks with high energy efficiency. The …