FlowCert: Translation Validation for Asynchronous Dataflow via Dynamic Fractional Permissions

Z Lin, J Gancher, B Parno - Proceedings of the ACM on Programming …, 2024 - dl.acm.org
Coarse-grained reconfigurable arrays (CGRAs) have gained attention in recent years due to
their promising power efficiency compared to traditional von Neumann architectures. To …

The TYR Dataflow Architecture: Improving Locality by Taming Parallelism

N Agarwal, M Fream, S Ghosh… - 2024 57th IEEE/ACM …, 2024 - ieeexplore.ieee.org
Architectures should aim to maximize parallelism within a machine's finite memories, but
prior designs tend to extremes, either maximizing parallelism or minimizing state. In …

Nexus Machine: An Active Message Inspired Reconfigurable Architecture for Irregular Workloads

R Juneja, TK Bandara, P Dangi, Z Li, T Mitra… - arxiv preprint arxiv …, 2025 - arxiv.org
Modern reconfigurable architectures are increasingly favored for resource-constrained edge
devices as they balance high performance, energy efficiency, and programmability well …

Enhancing CGRA Efficiency Through Aligned Compute and Communication Provisioning

Z Li, C Yin, TK Bandara, R Juneja, C Tan, Z Bai… - arxiv preprint arxiv …, 2024 - arxiv.org
Coarse-grained Reconfigurable Arrays (CGRAs) are domain-agnostic accelerators that
enhance the energy efficiency of resource-constrained edge devices. The CGRA landscape …

WaveCert: Translation Validation for Asynchronous Dataflow Programs via Dynamic Fractional Permissions

Z Lin, J Gancher, B Parno - arxiv preprint arxiv:2312.09326, 2023 - arxiv.org
Coarse-grained reconfigurable arrays (CGRAs) have gained attention in recent years due to
their promising power efficiency compared to traditional von Neumann architectures. To …

[PDF][PDF] Design of Energy‐Efficient CGRA‐based Systems

E de Bruin - 2024 - research.tue.nl
Technological advances over the last few decades enabled us to equip billions of low‐cost
mobile and embedded sensor devices with compute capabilities using general‐purpose …