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A survey of microarchitectural side-channel vulnerabilities, attacks, and defenses in cryptography
Side-channel attacks have become a severe threat to the confidentiality of computer
applications and systems. One popular type of such attacks is the microarchitectural attack …
applications and systems. One popular type of such attacks is the microarchitectural attack …
Timing side-channel attacks and countermeasures in CPU microarchitectures
Microarchitectural vulnerabilities, such as Meltdown and Spectre, exploit subtle
microarchitecture state to steal the user's secret data and even compromise the operating …
microarchitecture state to steal the user's secret data and even compromise the operating …
Last-level cache side-channel attacks are practical
We present an effective implementation of the Prime+ Probe side-channel attack against the
last-level cache. We measure the capacity of the covert channel the attack creates and …
last-level cache. We measure the capacity of the covert channel the attack creates and …
{ScatterCache}: thwarting cache attacks via cache set randomization
Cache side-channel attacks can be leveraged as a building block in attacks leaking secrets
even in the absence of software bugs. Currently, there are no practical and generic …
even in the absence of software bugs. Currently, there are no practical and generic …
A survey of microarchitectural timing attacks and countermeasures on contemporary hardware
Microarchitectural timing channels expose hidden hardware states though timing. We survey
recent attacks that exploit microarchitectural features in shared hardware, especially as they …
recent attacks that exploit microarchitectural features in shared hardware, especially as they …
Port contention for fun and profit
Simultaneous Multithreading (SMT) architectures are attractive targets for side-channel
enabled attackers, with their inherently broader attack surface that exposes more per …
enabled attackers, with their inherently broader attack surface that exposes more per …
{FLUSH+ RELOAD}: A high resolution, low noise, l3 cache {Side-Channel} attack
Sharing memory pages between non-trusting processes is a common method of reducing
the memory footprint of multi-tenanted systems. In this paper we demonstrate that, due to a …
the memory footprint of multi-tenanted systems. In this paper we demonstrate that, due to a …
Cache template attacks: Automating attacks on inclusive {Last-Level} caches
Recent work on cache attacks has shown that CPU caches represent a powerful source of
information leakage. However, existing attacks require manual identification of …
information leakage. However, existing attacks require manual identification of …
Varys: Protecting {SGX} enclaves from practical {Side-Channel} attacks
Numerous recent works have experimentally shown that Intel Software Guard Extensions
(SGX) are vulnerable to cache timing and page table side-channel attacks which could be …
(SGX) are vulnerable to cache timing and page table side-channel attacks which could be …
CacheBleed: a timing attack on OpenSSL constant-time RSA
The scatter–gather technique is a commonly implemented approach to prevent cache-based
timing attacks. In this paper, we show that scatter–gather is not constant time. We implement …
timing attacks. In this paper, we show that scatter–gather is not constant time. We implement …