Intel has recently introduced Intel® Transactional Synchronization Extensions (Intel® TSX)
in the Intel 4th Generation Core™ Processors. With Intel TSX, a processor can dynamically …

Emerging byte-addressable nonvolatile memories (NVMs) promise persistent memory,
which allows processors to directly access persistent data in main memory. Yet, persistent …

Fast concurrent hash tables are an increasingly important building block as we scale
systems to greater numbers of cores and threads. This paper presents the design …

Drawing inspiration from several previous projects, we present an ownership-record-free
software transactional memory (STM) system that combines extremely low overhead with …

This paper describes an end-to-end system implementation of the transactional memory
(TM) programming model on top of the hardware transactional memory (HTM) of the Blue …

Read-copy update (RCU) is a synchronization technique that often replaces reader-writer
locking because RCU's read-side primitives are both wait-free and an order of magnitude …

Thread-Level Speculation (TLS) is a promising technique that allows the parallel execution
of sequential code without relying on a prior, compile-time-dependence analysis. In this …

An increasing number of households is connected to the Internet via DSL or cable, for which
home gateways are required. The optimization of these-caused by their large number-is a …

Transactional memory (TM) is a promising synchronization mechanism for the next
generation of multicore processors. Best-effort Hardware Transactional Memory (HTM) …

Cryptography plays an important role in computer and communication security. In practical
implementations of cryptosystems, the cryptographic keys are usually loaded into the …