A bundled-data asynchronous circuit synthesis flow using a commercial EDA framework
Contemporary silicon technology enables integrating billions of transistors and allows the
creation of complex systems-on-chip. At the same time, strict power dissipation budgets and …
creation of complex systems-on-chip. At the same time, strict power dissipation budgets and …
Towards resilient qdi pipeline implementations
QDI circuits are robust towards timing issues, but this elasticity makes them vulnerable in
value-domain fault scenarios because data-accepting windows are flexibly defined by the …
value-domain fault scenarios because data-accepting windows are flexibly defined by the …
Set hardened derivatives of qdi buffer template
As critical charges become smaller due to technology advancement, Single Event
Transients (SET's) become more threatening to circuits. Quasi Delay-Insensitive (QDI) …
Transients (SET's) become more threatening to circuits. Quasi Delay-Insensitive (QDI) …
BAT-Hermes: a transition-signaling bundled-data NoC router
Networks on chip (NoCs) are efficient infrastructures to enable communication among the
large number of IPs that compose modern systems on chip (SoCs). However, even if recent …
large number of IPs that compose modern systems on chip (SoCs). However, even if recent …
[PDF][PDF] Asynchronous circuits: innovations in components, cell libraries and design templates
MT Moreira - 2016 - repositorio.pucrs.br
For decades now, the synchronous paradigm has been the major choice of the industry for
building integrated circuits. Unfortunately, with the development of semiconductor industry …
building integrated circuits. Unfortunately, with the development of semiconductor industry …
ζ: A Novel Approach for Mitigating Single Event Transient Effects in Quasi Delay Insensitive Logic
Due to their flexible data accepting windows Quasi Delay-Insensitive (QDI) circuits are
susceptible to environmental effects such as single event transients (SETs). Their mode of …
susceptible to environmental effects such as single event transients (SETs). Their mode of …
Towards Resilient Quasi Delay Insensitive Conditional Control Elements
The causal behavior of Quasi Delay-Insensitive (QDI) circuits may get compromised under
the effects of single event transients (SETs). To address the issue, the research community …
the effects of single event transients (SETs). To address the issue, the research community …
Persistent and nonviolent steps and the design of GALS systems
A concurrent system is persistent if throughout its operation no activity which became
enabled can subsequently be prevented from being executed by any other activity. This is …
enabled can subsequently be prevented from being executed by any other activity. This is …
[BOOK][B] Algorithms for automatic generation of relative timing constraints
Y Xu - 2011 - search.proquest.com
Asynchronous circuits exhibit impressive power and performance benefits over its
synchronous counterpart. Asynchronous system design, however, is not widely adopted due …
synchronous counterpart. Asynchronous system design, however, is not widely adopted due …
[PDF][PDF] Design and implementation of an asynchronous noc router using a transition-signaling bundled-data protocol
M Gibiluka - End of Term Work, 2013 - academia.edu
Current silicon technologies enable the integration of billions of transistors in a single chip,
supporting the creation of complex systems on a chip (SoCs). Networks on Chip (NoCs) …
supporting the creation of complex systems on a chip (SoCs). Networks on Chip (NoCs) …