Shaving retries with sentinels for fast read over high-density 3D flash
High-density flash-memory chips are under tremendous demands with the exponential
growth of data. At the same time, the slow read performance of these high-density flash …
growth of data. At the same time, the slow read performance of these high-density flash …
Exploiting error characteristic to optimize read voltage for 3-D NAND flash memory
3-D NAND flash memory has become increasingly popular nonvolatile storage devices due
to large capacity and high performance. With the increase of program/erase (P/E) cycles and …
to large capacity and high performance. With the increase of program/erase (P/E) cycles and …
Towards LDPC read performance of 3D flash memories with layer-induced error characteristics
3D flash memories have been widely developed to further increase the storage capacity of
SSDs by vertically stacking multiple layers. However, this special physical structure brings …
SSDs by vertically stacking multiple layers. However, this special physical structure brings …
ALCod: Adaptive LDPC coding for 3D NAND flash memory using inter-layer RBER variation
Three-dimensional (3D) NAND flash memory has been frequently utilized in consumer
electronics as a popular storage device. However, data reliability has become an important …
electronics as a popular storage device. However, data reliability has become an important …
Highly Reliable and Secure System with Multi-Layer Parallel LDPC and Kyber for 5G Communications
The development of fifth-generation (5G) technology marks a significant milestone for digital
communication systems, providing substantial improvements in data transmission speeds …
communication systems, providing substantial improvements in data transmission speeds …
Lightweight read reference voltage calibration strategy for improving 3-D TLC NAND flash memory reliability
H Feng, D Wei, Y Wang, Y Song… - IEEE Transactions on …, 2023 - ieeexplore.ieee.org
Flash memory has gradually become the dominant storage device in the consumer market
and data centers since the storage capacity increases and production costs decline …
and data centers since the storage capacity increases and production costs decline …
Analysis and optimization of temporary read errors in 3D NAND flash memories
S **a, X Jia, L **, Z Luo, Y Song, C Liu… - IEEE Electron …, 2021 - ieeexplore.ieee.org
Temporary read errors (TRE) refers to the high temporary fail bit count (FBC) in the first read,
when 3D NAND recovers froman idle state. This can seriously deteriorate the Quality of …
when 3D NAND recovers froman idle state. This can seriously deteriorate the Quality of …
Characterizing and Optimizing LDPC Performance on 3D NAND Flash Memories
With the development of NAND flash memories' bit density and stacking technologies, while
storage capacity keeps increasing, the issue of reliability becomes increasingly prominent …
storage capacity keeps increasing, the issue of reliability becomes increasingly prominent …
LDPC Level Prediction Toward Read Performance of High-Density Flash Memories
High-density NAND flash memories have been prevailing in storage systems to achieve
large capacities for explosive data. However, they suffer from more severe reliability …
large capacities for explosive data. However, they suffer from more severe reliability …
Edge word-line reliability problem in 3-D NAND flash memory: Observations, analysis, and solutions
D Wei, H Feng, M Liu, Y Song, Z Piao… - IEEE Transactions on …, 2023 - ieeexplore.ieee.org
The 3-D flash memory is gradually becoming the mainstream nonvolatile storage medium
due to its high capacity and high performance. However, interlayer interference during 3-D …
due to its high capacity and high performance. However, interlayer interference during 3-D …