Achieving near-zero read retry for 3d nand flash memory

M Ye, Q Li, Y Lv, J Zhang, T Ren, D Wen… - Proceedings of the 29th …, 2024 - dl.acm.org
As the flash-based storage devices age with program/erase (P/E) cycles, they require an
increasing number of read retries for error correction, which in turn deteriorates their read …

Shaving retries with sentinels for fast read over high-density 3D flash

Q Li, M Ye, Y Cui, L Shi, X Li, TW Kuo… - 2020 53rd Annual IEEE …, 2020 - ieeexplore.ieee.org
High-density flash-memory chips are under tremendous demands with the exponential
growth of data. At the same time, the slow read performance of these high-density flash …

Exploiting error characteristic to optimize read voltage for 3-D NAND flash memory

M Zhang, F Wu, Q Yu, W Liu, Y Wang… - IEEE Transactions on …, 2020 - ieeexplore.ieee.org
3-D NAND flash memory has become increasingly popular nonvolatile storage devices due
to large capacity and high performance. With the increase of program/erase (P/E) cycles and …

Lightweight read reference voltage calibration strategy for improving 3-D TLC NAND flash memory reliability

H Feng, D Wei, Y Wang, Y Song… - IEEE Transactions on …, 2023 - ieeexplore.ieee.org
Flash memory has gradually become the dominant storage device in the consumer market
and data centers since the storage capacity increases and production costs decline …

Towards LDPC read performance of 3D flash memories with layer-induced error characteristics

Y Du, S Huang, Y Zhou, Q Li - ACM Transactions on Design Automation …, 2023 - dl.acm.org
3D flash memories have been widely developed to further increase the storage capacity of
SSDs by vertically stacking multiple layers. However, this special physical structure brings …

Random flip bit aware reading for improving high-density 3-D NAND flash performance

H Feng, D Wei, S Gu, Z Piao, Y Wang… - IEEE Transactions on …, 2024 - ieeexplore.ieee.org
With the explosive growth of data storage demands, the storage density of flash memory
continues to increase. However, the reliability and read performance of high-density flash …

Adaptive granularity progressive LDPC decoding for NAND flash memory

B Bao, Q Li, W Guan, Q Wang… - IEEE Transactions on …, 2023 - ieeexplore.ieee.org
Progressive low-density parity check (LDPC) code decoding has been widely used to
correct increasing raw bit errors in NAND Flash memory. Once the decoding of a single …

Edge word-line reliability problem in 3-d nand flash memory: Observations, analysis, and solutions

D Wei, H Feng, M Liu, Y Song, Z Piao… - IEEE Transactions on …, 2023 - ieeexplore.ieee.org
The 3-D flash memory is gradually becoming the mainstream nonvolatile storage medium
due to its high capacity and high performance. However, interlayer interference during 3-D …

Exploiting feature layer for read reference voltage optimization on 3-D NAND flash memory

D Wei, Z Piao, M Liu, Y Zeng, H Feng… - IEEE Transactions …, 2023 - ieeexplore.ieee.org
Three-dimensional (3D) NAND flash memories have been widely employed as non-volatile
memory mediums in modern consumer electronics. However, the adoption of 3D structures …

Characterizing and optimizing LDPC performance on 3D NAND flash memories

Q Li, Y Chen, G Wu, Y Du, M Ye, X Gan… - ACM Transactions on …, 2024 - dl.acm.org
With the development of NAND flash memories' bit density and stacking technologies, while
storage capacity keeps increasing, the issue of reliability becomes increasingly prominent …