Design and Analysis of 3D Integrated Folded Ferro-Capacitive Crossbar Array (FC2A) for Brain-Inspired Computing System

SA Thomas, S Kushwaha, R Sharma… - IEEE Journal on …, 2024 - ieeexplore.ieee.org
This paper presents a novel 3D folded capacitive synaptic crossbar array designed for in-
memory computing architectures. In this architecture, the bitline is folded over the wordline to …

Edge PoolFormer: Modeling and Training of PoolFormer Network on RRAM Crossbar for Edge-AI Applications

T Cao, W Yu, Y Gao, C Liu, T Zhang… - IEEE Transactions on …, 2024 - ieeexplore.ieee.org
PoolFormer is a subset of Transformer neural network with a key difference of replacing
computationally demanding token mixer with pooling function. In this work, a memristor …

Optimizing hardware-software co-design based on non-ideality in memristor crossbars for in-memory computing

P Jiang, D Song, M Huang, F Yang, L Wang… - Science China …, 2025 - Springer
The memristor crossbar, with its exceptionally high storage density and parallelism, enables
efficient vector matrix multiplication (VMM), significantly improving data throughput and …

Compact modeling and mitigation of parasitics in crosspoint accelerators of neural networks

N Lepri, A Glukhov, P Mannocci… - … on Electron Devices, 2024 - ieeexplore.ieee.org
In-memory computing (IMC) can accelerate data-intensive tasks, such as matrix-vector
multiplication (MVM) or artificial neural networks (ANNs) inference, by means of the …

RRAM-PoolFormer: a resistive memristor-based PoolFormer modeling and training framework for edge-AI applications

T Cao, W Yu, Y Gao, C Liu, S Yan… - 2023 IEEE International …, 2023 - ieeexplore.ieee.org
PoolFormer is a type of neural network architecture that is abstracted from Transformer
where the computationally heavy token mixer module is replaced with simple pooling …

Binary‐Stochasticity‐Enabled Highly Efficient Neuromorphic Deep Learning Achieves Better‐than‐Software Accuracy

Y Li, W Wang, M Wang, C Dou, Z Ma… - Advanced Intelligent …, 2024 - Wiley Online Library
In this work, the requirement of using high‐precision (HP) signals is lifted and the circuits for
implementing deep learning algorithms in memristor‐based hardware are simplified. The …

A Calibratable Model for Fast Energy Estimation of MVM Operations on RRAM Crossbars

J Cubero-Cascante, A Vaidyanathan, R Pelke… - arxiv preprint arxiv …, 2024 - arxiv.org
The surge in AI usage demands innovative power reduction strategies. Novel Compute-in-
Memory (CIM) architectures, leveraging advanced memory technologies, hold the potential …