Circuit failure prediction predicts the occurrence of a circuit failure before errors actually
appear in system data and states. This is in contrast to classical error detection where a …

This paper presents a predictive model for the negative bias temperature instability (NBTI) of
PMOS under both short term and long term operation. Based on the reaction-diffusion (RD) …

Ternary content addressable memories (TCAMs) represent a form of logic-in-memory and
are currently widely used in routers, caches, and efficient machine learning models. From a …

Negative bias temperature instability (NBTI) and channel hot carrier (CHC) are the leading
reliability concerns for nanoscale transistors. The de facto modeling method to analyze CHC …

Negative-bias-temperature instability (NBTI) has become the primary limiting factor of circuit
life time. In this paper, we develop a hierarchical framework for analyzing the impact of NBTI …

The continued scaling of silicon fabrication technology has led to significant reliability
concerns, which are quickly becoming a dominant design challenge. Design integrity is …

Precise measurement of digital circuit degradation is a key aspect of aging tolerant digital
circuit design. In this study, we present a fully digital on-chip reliability monitor for high …

Processors progressively age during their service life due to normal workload activity. Such
aging results in gradually slower circuits. Anticipating this fact, designers add timing …

Data transfer between a processor and memory frequently represents a bottleneck with
respect to improving application-level performance. Computing in memory (CiM), where …

Among the beyond-complementary metal-oxide-semiconductor (CMOS) devices being
explored, ferroelectric field-effect transistors (FeFETs) are considered as one of the most …