Ultra-low power VLSI circuit design demystified and explained: A tutorial
M Alioto - IEEE Transactions on Circuits and Systems I: Regular …, 2012 - ieeexplore.ieee.org
In this paper, the state of the art in ultra-low power (ULP) VLSI design is presented within a
unitary framework for the first time. A few general principles are first introduced to gain an …
unitary framework for the first time. A few general principles are first introduced to gain an …
Effect of gate engineering in double-gate MOSFETs for analog/RF applications
This work uncovers the potential benefit of fully-depleted short-channel triple-material
double-gate (TM-DG) SOI MOSFET in the context of RF and analog performance …
double-gate (TM-DG) SOI MOSFET in the context of RF and analog performance …
Interests and limitations of technology scaling for subthreshold logic
Subthreshold logic is an efficient technique to achieve ultralow energy per operation for low-
to-medium throughput applications. In this paper, the interests and limitations of technology …
to-medium throughput applications. In this paper, the interests and limitations of technology …
Device and Circuit Design Challenges in the Digital Subthreshold Region for Ultralow‐Power Applications
In recent years, subthreshold operation has gained a lot of attention due to ultra low‐power
consumption in applications requiring low to medium performance. It has also been shown …
consumption in applications requiring low to medium performance. It has also been shown …
Utilizing reverse short channel effect for optimal subthreshold circuit design
The impact of the Reverse Short Channel Effect (RSCE) on device current is stronger in the
subthreshold region due to the reduced Drain-Induced-Barrier-Lowering (DIBL) and the …
subthreshold region due to the reduced Drain-Induced-Barrier-Lowering (DIBL) and the …
Device and circuit co-design robustness studies in the subthreshold logic for ultralow-power applications for 32 nm CMOS
Digital circuits operating in a subthreshold region have gained wide interest due to their
suitability for applications requiring ultralow power consumption with low-to-medium …
suitability for applications requiring ultralow power consumption with low-to-medium …
Nanometer device scaling in subthreshold logic and SRAM
Subthreshold circuit design is promising for future ultralow-energy sensor applications as
well as highly parallel high-performance processing. Device scaling has the potential to …
well as highly parallel high-performance processing. Device scaling has the potential to …
Impact of halo do** on the subthreshold performance of deep-submicrometer CMOS devices and circuits for ultralow power analog/mixed-signal applications
S Chakraborty, A Mallik, CK Sarkar… - IEEE Transactions on …, 2007 - ieeexplore.ieee.org
In addition to its attractiveness for ultralow power applications, analog CMOS circuits based
on the subthreshold operation of the devices are known to have significantly higher gain as …
on the subthreshold operation of the devices are known to have significantly higher gain as …
Circuit design advances for wireless sensing applications
Miniature wireless sensors with long lifetimes enable new applications for medical
diagnosis, infrastructure monitoring, military surveillance, and environmental sensing among …
diagnosis, infrastructure monitoring, military surveillance, and environmental sensing among …
Analog and RF performance investigation of cylindrical surrounding-gate MOSFET with an analytical pseudo-2D model
We report a systematic, quantitative investigation of analog and RF performance of
cylindrical surrounding-gate (SRG) silicon MOSFET. To derive the model, a pseudo-two …
cylindrical surrounding-gate (SRG) silicon MOSFET. To derive the model, a pseudo-two …