Magnetic racetrack memory: From physics to the cusp of applications within a decade

R Bläsing, AA Khan, PC Filippou, C Garg… - Proceedings of the …, 2020 - ieeexplore.ieee.org
Racetrack memory (RTM) is a novel spintronic memory-storage technology that has the
potential to overcome fundamental constraints of existing memory and storage devices. It is …

Spin-transfer torque memories: Devices, circuits, and systems

X Fong, Y Kim, R Venkatesan, SH Choday… - Proceedings of the …, 2016 - ieeexplore.ieee.org
Spin-transfer torque magnetic memory (STT-MRAM) has gained significant research interest
due to its nonvolatility and zero standby leakage, near unlimited endurance, excellent …

A survey of techniques for architecting processor components using domain-wall memory

S Mittal - ACM Journal on Emerging Technologies in Computing …, 2016 - dl.acm.org
Recent trends of increasing core-count and bandwidth/memory wall have motivated
researchers to explore novel memory technologies for designing processor components …

Shiftsreduce: Minimizing shifts in racetrack memory 4.0

AA Khan, F Hameed, R Bläsing, SSP Parkin… - ACM Transactions on …, 2019 - dl.acm.org
Racetrack memories (RMs) have significantly evolved since their conception in 2008,
making them a serious contender in the field of emerging memory technologies. Despite key …

Memory that never forgets: Emerging nonvolatile memory and the implication for architecture design

G Sun, J Zhao, M Poremba, C Xu… - National Science …, 2018 - academic.oup.com
In order to mitigate the problem of the 'memory wall', various emerging nonvolatile memory
(NVM) technologies have been proposed to replace the traditional ones. These emerging …

Exploring main memory design based on racetrack memory technology

Q Hu, G Sun, J Shu, C Zhang - Proceedings of the 26th edition on Great …, 2016 - dl.acm.org
Emerging non-volatile memories (NVMs), which include PC-RAM and STT-RAM, have been
proposed to replace DRAM, mainly because they have better scalability and lower standby …

FusedCache: A naturally inclusive, racetrack memory, dual-level private cache

H Xu, Y Alkabani, R Melhem… - IEEE Transactions on …, 2016 - ieeexplore.ieee.org
We propose FusedCache, a two-level set-associative Racetrack memory (RM) cache design
that utilizes RM's high density for providing fast uniform access at one level, and non-uniform …

Rnnfast: An accelerator for recurrent neural networks using domain-wall memory

MH Samavatian, A Bacha, L Zhou… - ACM Journal on …, 2020 - dl.acm.org
Recurrent Neural Networks (RNNs) are an important class of neural networks designed to
retain and incorporate context into current decisions. RNNs are particularly well suited for …

ROLLED: Racetrack memory optimized linear layout and efficient decomposition of decision trees

C Hakert, AA Khan, KH Chen, F Hameed… - IEEE Transactions …, 2022 - ieeexplore.ieee.org
Modern low power distributed systems tend to integrate machine learning algorithms. In
resource-constrained setups, the execution of the models has to be optimized for …

Cache memory design with magnetic skyrmions in a long nanotrack

MC Chen, A Ranjan, A Raghunathan… - IEEE Transactions on …, 2019 - ieeexplore.ieee.org
Magnetic skyrmion (MS), a vortexlike region with reversed magnetization in nanomagnets,
has recently emerged as an exciting development in the field of spintronics. It has a number …