The reliance on multi/many-core systems to satisfy the high performance requirement of
complex embedded software applications is increasing. This necessitates the need to …

Multi-/many-core systems are envisioned to satisfy the ever-increasing performance
requirements of complex applications in various domains such as embedded and high …

Design-time decisions can often only cover certain scenarios and fail in efficiency when hard-
to-predict system scenarios occur. This drives the development of run-time adaptive …

Network-on-chip (NoC) is an energy-efficient on-chip communication architecture for multi-
tile system-on-chip (SoC) architectures. The SoC architecture, including its run-time …

Efficient run-time map** of tasks onto Multiprocessor System-on-Chip (MPSoC) is very
challenging especially when new tasks of other applications are also required to be …

Heterogeneous reconfigurable systems provide drastically higher performance and lower
power consumption than traditional CPU-centric systems. Moreover, they do it at much lower …

A network-on-chip (NoC) is an energy-efficient on-chip communication architecture for multi-
processor system-on-chip (MPSoC) architectures. In earlier papers we proposed two …

In this paper, we aim to improve the performance and power metrics of packet-switched
network-on-chips (NoCs) and benefits from the scalability and resource utilization …

Multi/Many-core systems are prevalent in several application domains targeting different
scales of computing such as embedded and cloud computing. These systems are able to …

Networks on chip (NoC) have emerged as the design paradigm for scalable system on chip
(SoC) communication infrastructure. Due to convergence, a growing number of applications …