In this article, we propose TAPA, an end-to-end framework that compiles a C++ task-parallel
dataflow program into a high-frequency FPGA accelerator. Compared to existing solutions …

Despite the increasing adoption of FPGAs in compute clouds, there remains a significant
gap in programming tools and abstractions which can leverage network-connected, cloud …

Stencil-based applications play an essential role in high-performance systems as they occur
in numerous computational areas, such as partial differential equation solving. In this …

In a typical integrated circuit electronic design automation (EDA) flow, scheduling is a key
step in high-level synthesis, which is the first stage of the EDA flow that synthesizes a cycle …

In recent years, there has been a surging demand for edge computing of image processing
and machine learning workloads. This has reignited interest in the development of custom …

The slowing of CMOS technology scaling mismatches the ever-increasing demand for
computational power, leading to a rise in the use of heterogeneous systems, which pair …

High-level synthesis (HLS) tools simplify the FPGA design processes by allowing users to
express their designs in high-level languages such as C/C++ or OpenCL. In this way, users …

Stencil-based computations are ubiquitous, for they embody a prevalent means that applies
to wildly diferent and distant scientiic ields. For instance, inance [33], image processing [14 …