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A survey of techniques for dynamic branch prediction
S Mittal - Concurrency and Computation: Practice and …, 2019 - Wiley Online Library
Branch predictor (BP) is an essential component in modern processors since high BP
accuracy can improve performance and reduce energy by decreasing the number of …
accuracy can improve performance and reduce energy by decreasing the number of …
Speculative precomputation: Long-range prefetching of delinquent loads
This paper explores Speculative Precomputation, a technique that uses idle thread context
in a multithreaded architecture to improve performance of single-threaded applications. It …
in a multithreaded architecture to improve performance of single-threaded applications. It …
Whole program paths
JR Larus - ACM SIGPLAN Notices, 1999 - dl.acm.org
Whole program paths (WPP) are a new approach to capturing and representing a program's
dynamic---actually executed---control flow. Unlike other path profiling techniques, which …
dynamic---actually executed---control flow. Unlike other path profiling techniques, which …
The bi-mode branch predictor
CC Lee, ICK Chen, TN Mudge - Proceedings of 30th Annual …, 1997 - ieeexplore.ieee.org
Dynamic branch predictors are popular because they can deliver accurate branch prediction
without changes to the instruction set architecture or pre existing binaries. However, to …
without changes to the instruction set architecture or pre existing binaries. However, to …
Design tradeoffs for the Alpha EV8 conditional branch predictor
This paper presents the Alpha EV8 conditional branch predictor The Alpha EV8
microprocessor project, canceled in June 2001 in a late phase of development, envisioned …
microprocessor project, canceled in June 2001 in a late phase of development, envisioned …
Instruction scheduling for instruction level parallel processors
Nearly all personal computer and workstation processors, and virtually all high-performance
embedded processor cores, now embody instruction level parallel (ILP) processing in the …
embedded processor cores, now embody instruction level parallel (ILP) processing in the …
Trading conflict and capacity aliasing in conditional branch predictors
As modern microprocessors employ deeper pipelines and issue multiple instructions per
cycle, they are becoming increasingly dependent on accurate branch prediction. Because …
cycle, they are becoming increasingly dependent on accurate branch prediction. Because …
The YAGS branch prediction scheme
AN Eden, T Mudge - Proceedings. 31st Annual ACM/IEEE …, 1998 - ieeexplore.ieee.org
The importance of an accurate branch prediction mechanism has been well documented.
Since the introduction of gshare and the observation that aliasing in the PHT is a major …
Since the introduction of gshare and the observation that aliasing in the PHT is a major …
The agree predictor: A mechanism for reducing negative branch history interference
E Sprangle, RS Chappell, M Alsup… - Proceedings of the 24th …, 1997 - dl.acm.org
Deeply pipelined, superscalar processors require accurate branch prediction to achieve
high performance. Two-level branch predictors have been shown to achieve high prediction …
high performance. Two-level branch predictors have been shown to achieve high prediction …
Analysis of the o-geometric history length branch predictor
A Seznec - … Symposium on Computer Architecture (ISCA'05), 2005 - ieeexplore.ieee.org
In this paper, we introduce and analyze the Optimized GEometric History Length (O-GEHL)
branch Predictor that efficiently exploits very long global histories in the 100-200 bits range …
branch Predictor that efficiently exploits very long global histories in the 100-200 bits range …