Design and investigation of a novel gate-all-around vertical tunnel FET with improved DC and analog/RF parameters

KRN Karthik, CK Pandey - ECS Journal of Solid State Science …, 2022 - iopscience.iop.org
In this paper, a novel structure of gate-all-around vertical TFET (GAA-VTFET) is proposed
and investigated for the first time with the help of 3D TCAD simulator. It is found that GAA …

Interfacial trap charge and self-heating effect based reliability analysis of a Dual-Drain Vertical Tunnel FET

D Das, CK Pandey - Microelectronics Reliability, 2023 - Elsevier
This manuscript exclusively addresses the reliability concern of a double-drain vertical TFET
(DD-VTFET) by analysing the influence of interface trap charges and variation in ambient …

Design and simulation of junctionless nanowire tunnel field effect transistor for highly sensitive biosensor

P Kumar, B Raj - Microelectronics Journal, 2023 - Elsevier
This paper investigates symmetrical design of a Junctionless Nanowire Tunnel-Field-Effect-
Transistor (JL-NWTFET) for highly sensitive biosensor. JL-NWTFET deployed using Gate-All …

Analysis on electrical parameters including temperature and interface trap charges in gate overlap Ge source step shape double gate TFET

R Saha, R Goswami, DK Panda - Microelectronics Journal, 2022 - Elsevier
In this paper, the electrical parameters are evaluated for the variations of temperature in
Gate Overlap Ge source Step Shape Double Gate TFET (GO-Ge-SSDG-TFET) under the …

Impact of band gap and gate dielectric engineering on novel Si0. 1Ge0. 9-GaAs lateral N-type charge plasma based JLTFET

K Kumar, SC Sharma - Microelectronics Journal, 2022 - Elsevier
In this research article, a device called dual dielectric gate hetero-material junctionless TFET
(DD-HJLTFET) is proposed using a novel amalgamation of Si 0.1 Ge 0.9/GaAs for the first …

Improved optical performance in near visible light detection photosensor based on TFET

S Tiwari, R Saha - Microelectronics Journal, 2022 - Elsevier
This paper presents the performance comparison of Si-based, Ge-source, and Heterogate
(HG) TFET photosensor under visible range of spectrum using TCAD simulator. The optical …

Demonstration of a novel Dual-Source Elevated-Channel Do**less TFET with improved DC and Analog/RF performance

T Ashok, CK Pandey - Microelectronics Journal, 2024 - Elsevier
In this paper, a novel Dual-Source Elevated-Channel Do**less TFET (DSEC-DLTFET) is
proposed to enhance the dc and analog/high-frequency (HF) performance of the device …

Impact on performance of dual stack hetero-gated dielectric modulated TFET biosensor due to Si1-xGex pocket variation

A Mangla, R Saha, R Goswami - Microelectronics Journal, 2022 - Elsevier
In this work, the performance evaluation of a dual stack hetero-gated pocket modulated
tunnel FET (DSHGPM-TFET) based biosensor is presented. In the proposed device, cavity is …

Analytical drain current model development of twin gate TFET in subthreshold and super threshold regions

P Raut, U Nanda, DK Panda - Microelectronics Journal, 2023 - Elsevier
In this work, an analytical model for a twin gate Tunnel Field Effect Transistor's drain current
operating in the subthreshold and superthreshold regions is proposed. Using this drain …

A dual-drain vertical tunnel FET with improved device performance: proposal, optimization, and investigation

D Das, CK Pandey - ECS Journal of Solid State Science and …, 2022 - iopscience.iop.org
In this manuscript, a dual-drain Vertical Tunnel FET structure is proposed and investigated
for the first time. The simulation outcomes clearly manifest that reduction in channel …