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Mitigation of radiation effects in SRAM-based FPGAs for space applications
The use of static random access memory (SRAM)-based field programmable gate arrays
(FPGAs) in harsh radiation environments has grown in recent years. These types of …
(FPGAs) in harsh radiation environments has grown in recent years. These types of …
Design techniques for **linx Virtex FPGA configuration memory scrubbers
SRAM-based FPGAs are in-field reconfigurable an unlimited number of times. This
characteristic, together with their high performance and high logic density, proves to be very …
characteristic, together with their high performance and high logic density, proves to be very …
A review on SEU mitigation techniques for FPGA configuration memory
Single event upset (SEU) has become one of the major threats to dependable application
development targeted at safety systems in field programmable gate arrays (FPGAs). This …
development targeted at safety systems in field programmable gate arrays (FPGAs). This …
A new analytical approach to estimate the effects of SEUs in TMR architectures implemented through SRAM-based FPGAs
In order to deploy successfully commercially-off-the-shelf SRAM-based FPGA devices in
safety-or mission-critical applications, designers need to adopt suitable hardening …
safety-or mission-critical applications, designers need to adopt suitable hardening …
SEU mitigation and validation of the LEON3 soft processor using triple modular redundancy for space processing
Processors are an essential component in most satellite payload electronics and handle a
variety of functions including command handling and data processing. There is growing …
variety of functions including command handling and data processing. There is growing …
Improving the effectiveness of TMR designs on FPGAs with SEU-aware incremental placement
TMR combined with configuration scrubbing is an effective technique to mitigate against
radiation-induced CRAM upsets on SRAM-based FPGAs. However, its effectiveness is …
radiation-induced CRAM upsets on SRAM-based FPGAs. However, its effectiveness is …
An analysis based on fault injection of hardening techniques for SRAM-based FPGAs
Triple Modular Redundancy (TMR) is recognized as one of the possible solutions to harden
circuits implemented on SRAM-based FPGAs against soft-errors affecting configuration …
circuits implemented on SRAM-based FPGAs against soft-errors affecting configuration …
Fast SEU detection and correction in LUT configuration bits of SRAM-based FPGAs
FPGAs are an appealing solution for the space-based remote sensing applications.
However, in a low-earth orbit, configuration bits of SRAM-based FPGAs are susceptible to …
However, in a low-earth orbit, configuration bits of SRAM-based FPGAs are susceptible to …
A cost-effective selective TMR for heterogeneous coarse-grained reconfigurable architectures based on DFG-level vulnerability analysis
This paper proposes a method to determine a priority for applying selective triple modular
redundancy (selective TMR) against single event upset (SEU) to achieve cost-effective …
redundancy (selective TMR) against single event upset (SEU) to achieve cost-effective …
Evaluating different solutions to design fault tolerant systems with SRAM-based FPGAs
The latest SRAM-based FPGA devices are making the development of low-cost, high-
performance, re-configurable systems feasible, paving the way for innovative architectures …
performance, re-configurable systems feasible, paving the way for innovative architectures …