Mitigation of radiation effects in SRAM-based FPGAs for space applications

F Siegle, T Vladimirova, J Ilstad, O Emam - ACM Computing Surveys …, 2015‏ - dl.acm.org
The use of static random access memory (SRAM)-based field programmable gate arrays
(FPGAs) in harsh radiation environments has grown in recent years. These types of …

Design techniques for **linx Virtex FPGA configuration memory scrubbers

I Herrera-Alzu, M Lopez-Vallejo - IEEE transactions on Nuclear …, 2013‏ - ieeexplore.ieee.org
SRAM-based FPGAs are in-field reconfigurable an unlimited number of times. This
characteristic, together with their high performance and high logic density, proves to be very …

A review on SEU mitigation techniques for FPGA configuration memory

TS Nidhin, A Bhattacharyya, RP Behera… - IETE Technical …, 2018‏ - Taylor & Francis
Single event upset (SEU) has become one of the major threats to dependable application
development targeted at safety systems in field programmable gate arrays (FPGAs). This …

A new analytical approach to estimate the effects of SEUs in TMR architectures implemented through SRAM-based FPGAs

L Sterpone, M Violante - IEEE Transactions on Nuclear Science, 2005‏ - ieeexplore.ieee.org
In order to deploy successfully commercially-off-the-shelf SRAM-based FPGA devices in
safety-or mission-critical applications, designers need to adopt suitable hardening …

SEU mitigation and validation of the LEON3 soft processor using triple modular redundancy for space processing

MJ Wirthlin, AM Keller, C McCloskey, P Ridd… - Proceedings of the …, 2016‏ - dl.acm.org
Processors are an essential component in most satellite payload electronics and handle a
variety of functions including command handling and data processing. There is growing …

Improving the effectiveness of TMR designs on FPGAs with SEU-aware incremental placement

M Cannon, A Keller, M Wirthlin - 2018 IEEE 26th Annual …, 2018‏ - ieeexplore.ieee.org
TMR combined with configuration scrubbing is an effective technique to mitigate against
radiation-induced CRAM upsets on SRAM-based FPGAs. However, its effectiveness is …

An analysis based on fault injection of hardening techniques for SRAM-based FPGAs

L Sterpone, M Violante, S Rezgui - IEEE Transactions on …, 2006‏ - ieeexplore.ieee.org
Triple Modular Redundancy (TMR) is recognized as one of the possible solutions to harden
circuits implemented on SRAM-based FPGAs against soft-errors affecting configuration …

Fast SEU detection and correction in LUT configuration bits of SRAM-based FPGAs

HR Zarandi, SG Miremadi, C Argyrides… - 2007 IEEE …, 2007‏ - ieeexplore.ieee.org
FPGAs are an appealing solution for the space-based remote sensing applications.
However, in a low-earth orbit, configuration bits of SRAM-based FPGAs are susceptible to …

A cost-effective selective TMR for heterogeneous coarse-grained reconfigurable architectures based on DFG-level vulnerability analysis

T Imagawa, H Tsutsui, H Ochi… - 2013 Design, Automation …, 2013‏ - ieeexplore.ieee.org
This paper proposes a method to determine a priority for applying selective triple modular
redundancy (selective TMR) against single event upset (SEU) to achieve cost-effective …

Evaluating different solutions to design fault tolerant systems with SRAM-based FPGAs

L Sterpone, M Sonza Reorda, M Violante… - Journal of Electronic …, 2007‏ - Springer
The latest SRAM-based FPGA devices are making the development of low-cost, high-
performance, re-configurable systems feasible, paving the way for innovative architectures …