Thirty years of machine learning: The road to Pareto-optimal wireless networks

J Wang, C Jiang, H Zhang, Y Ren… - … Surveys & Tutorials, 2020‏ - ieeexplore.ieee.org
Future wireless networks have a substantial potential in terms of supporting a broad range of
complex compelling applications both in military and civilian fields, where the users are able …

A survey of computer architecture simulation techniques and tools

A Akram, L Sawalha - Ieee Access, 2019‏ - ieeexplore.ieee.org
Computer architecture simulators play an important role in advancing computer architecture
research. With wider research directions and the increased number of simulators that have …

CEASER: Mitigating conflict-based cache attacks via encrypted-address and remap**

MK Qureshi - 2018 51st Annual IEEE/ACM International …, 2018‏ - ieeexplore.ieee.org
Modern processors share the last-level cache between all the cores to efficiently utilize the
cache space. Unfortunately, such sharing makes the cache vulnerable to attacks whereby …

ZSim: Fast and accurate microarchitectural simulation of thousand-core systems

D Sanchez, C Kozyrakis - ACM SIGARCH Computer architecture news, 2013‏ - dl.acm.org
Architectural simulation is time-consuming, and the trend towards hundreds of cores is
making sequential simulation even slower. Existing parallel simulation techniques either …

Sniper: Exploring the level of abstraction for scalable and accurate parallel multi-core simulation

TE Carlson, W Heirman, L Eeckhout - Proceedings of 2011 International …, 2011‏ - dl.acm.org
Two major trends in high-performance computing, namely, larger numbers of cores and the
growing size of on-chip cache memory, are creating significant challenges for evaluating the …

Machine learning in compiler optimization

Z Wang, M O'Boyle - Proceedings of the IEEE, 2018‏ - ieeexplore.ieee.org
In the last decade, machine-learning-based compilation has moved from an obscure
research niche to a mainstream activity. In this paper, we describe the relationship between …

[كتاب][B] Benchmarking modern multiprocessors

C Bienia - 2011‏ - search.proquest.com
Benchmarking has become one of the most important methods for quantitative performance
evaluation of processor and computer system designs. Benchmarking of modern …

McPAT: An integrated power, area, and timing modeling framework for multicore and manycore architectures

S Li, JH Ahn, RD Strong, JB Brockman… - Proceedings of the …, 2009‏ - dl.acm.org
This paper introduces McPAT, an integrated power, area, and timing modeling framework
that supports comprehensive design space exploration for multicore and manycore …

Pin: building customized program analysis tools with dynamic instrumentation

CK Luk, R Cohn, R Muth, H Patil, A Klauser… - Acm sigplan …, 2005‏ - dl.acm.org
Robust and powerful software instrumentation tools are essential for program analysis tasks
such as profiling, performance evaluation, and bug detection. To meet this need, we have …

An evaluation of high-level mechanistic core models

TE Carlson, W Heirman, S Eyerman, I Hur… - ACM Transactions on …, 2014‏ - dl.acm.org
Large core counts and complex cache hierarchies are increasing the burden placed on
commonly used simulation and modeling techniques. Although analytical models provide …