Hardware implementation of memristor-based artificial neural networks

F Aguirre, A Sebastian, M Le Gallo, W Song… - Nature …, 2024 - nature.com
Artificial Intelligence (AI) is currently experiencing a bloom driven by deep learning (DL)
techniques, which rely on networks of connected simple computing units operating in …

Transaction level modeling: an overview

L Cai, D Gajski - Proceedings of the 1st IEEE/ACM/IFIP international …, 2003 - dl.acm.org
Recently, the transaction-level modeling has been widely referred to in system-level design
community. However, the transaction-level models (TLMs) are not well defined and the …

High-level synthesis for FPGAs: From prototy** to deployment

J Cong, B Liu, S Neuendorffer… - … on Computer-Aided …, 2011 - ieeexplore.ieee.org
Escalating system-on-chip design complexity is pushing the design community to raise the
level of abstraction beyond register transfer level. Despite the unsuccessful adoptions of …

[책][B] Embedded system design: embedded systems foundations of cyber-physical systems, and the internet of things

P Marwedel - 2021 - library.oapen.org
A unique feature of this open access textbook is to provide a comprehensive introduction to
the fundamental knowledge in embedded systems, with applications in cyber-physical …

Hardware/software codesign: The past, the present, and predicting the future

J Teich - Proceedings of the IEEE, 2012 - ieeexplore.ieee.org
Hardware/software codesign investigates the concurrent design of hardware and software
components of complex electronic systems. It tries to exploit the synergy of hardware and …

An introduction to high-level synthesis

P Coussy, DD Gajski, M Meredith… - IEEE Design & Test of …, 2009 - ieeexplore.ieee.org
An Introduction to High-Level Synthesis Page 1 An Introduction to High-Level Synthesis
Philippe Coussy Université de Bretagne-Sud, Lab-STICC Daniel D. Gajski University of …

Bluespec System Verilog: efficient, correct RTL from high level specifications

R Nikhil - Proceedings. Second ACM and IEEE International …, 2004 - ieeexplore.ieee.org
Bluespec System Verilog is an EDL toolset for ASIC and FPGA design offering significantly
higher productivity via a radically different approach to high-level synthesis. Many other …

[책][B] On-chip communication architectures: system on chip interconnect

S Pasricha, N Dutt - 2010 - books.google.com
Over the past decade, system-on-chip (SoC) designs have evolved to address the ever
increasing complexity of applications, fueled by the era of digital convergence …

[책][B] Industrial communication technology handbook

R Zurawski - 2014 - books.google.com
Featuring contributions from major technology vendors, industry consortia, and government
and private research establishments, the Industrial Communication Technology Handbook …

[책][B] Electronic design automation: synthesis, verification, and test

LT Wang, YW Chang, KTT Cheng - 2009 - books.google.com
This book provides broad and comprehensive coverage of the entire EDA flow. EDA/VLSI
practitioners and researchers in need of fluency in an" adjacent" field will find this an …