[HTML][HTML] Design topologies of a CMOS charge pump circuit for low power applications

LF Rahman, M Marufuzzaman, L Alam, MB Mokhtar - Electronics, 2021 - mdpi.com
Applications such as non-volatile memories (NVM), radio frequency identification (RFID),
high voltage generators, switched capacitor circuits, operational amplifiers, voltage …

Pseudo Asynchronous Level Crossing adc for ecg Signal Acquisition

T Marisa, T Niederhauser, A Haeberlin… - IEEE transactions on …, 2017 - ieeexplore.ieee.org
A new pseudo asynchronous level crossing analogue-to-digital converter (ADC) architecture
targeted for low-power, implantable, long-term biomedical sensing applications is …

A low‐offset low‐power and high‐speed dynamic latch comparator with a preamplifier‐enhanced stage

JK Folla, ML Crespo, ET Wembe… - IET Circuits, Devices …, 2021 - Wiley Online Library
The preamplifier module is a crucial element while designing dynamic latch comparators.
The traditional double tail comparator utilizes a differential pair as the preamplifier stage …

[HTML][HTML] A 0.18-μm CMOS high-data-rate true random bit generator through ΔΣ modulation of chaotic jerk circuit signals

C Wannaboon, M Tachibana, W San-Um - Chaos: An Interdisciplinary …, 2018 - pubs.aip.org
A full-custom design of chaos-based True Random-Bit Generator (TRBG) implemented on a
0.18-μm CMOS technology is presented with unique composition of three major …

Efficient self‐powered convertor with digitally controlled oscillator‐based adaptive maximum power point tracking and RF kick‐start for ultralow‐voltage thermoelectric …

C Wang, Z Li, K Zhao, Q Guo - IET Circuits, Devices & Systems, 2016 - Wiley Online Library
A self‐powered convertor for thermoelectric energy harvesting in body sensor nodes (BSNs)
is designed to boost extremely low voltage to the typical supply voltage of BSNs. An …

Design of low-power high-speed double-tail dynamic CMOS comparator using novel latch structure

R Jain, AK Dubey, V Varshney… - 2017 4th IEEE Uttar …, 2017 - ieeexplore.ieee.org
Regenerative comparators due to its power efficiency and high-speed finds usage in many
high-speed and low-power analog-to-digital converters. In this paper, a novel comparator …

Efficient modeling of low‐resolution millimeter‐wave transceivers for massive MIMO wireless communications systems

N Estes, K Gao, B Hochwald… - Microwave and …, 2021 - Wiley Online Library
We present a high‐fidelity measurement‐based nonlinear model of low‐complexity
millimeter‐wave transmit and receive circuits for design and analysis of 1‐bit on‐off‐key …

A low power and low ripple CMOS high voltage generator for RFID transponder EEPROM

LF Rahman, M Marufuzzaman, L Alam, LM Sidek… - Plos one, 2020 - journals.plos.org
A high-voltage generator (HVG) is an essential part of a radio frequency identification
electrically erasable programmable read-only memory (RFID–EEPROM). An HVG circuit is …

Pipelining method for low-power and high-speed SAR ADC design

Z Fazel, S Saeedi, M Atarodi - Analog Integrated Circuits and Signal …, 2016 - Springer
A low power analog to digital converter (ADC), based on a pipelining method employed in
successive approximation register (SAR) architecture is presented. This structure is a two …

Design of low-cost transimpedance amplifier for optical receiver

M Marufuzzaman, MBI Reaz, LS Yeng… - … on Electrical and …, 2018 - Springer
The transimpedance amplifier (TIA) is the most favorable and efficient choice for the front-
end preamplifier in optical fiber communication systems. High gain and low input noise to …