Map** techniques in multicore processors: current and future trends

M Gupta, L Bhargava, S Indu - The Journal of Supercomputing, 2021 - Springer
Multicore systems are in demand due to their high performance thus making application
map** an important research area in this field. Breaking an application into multiple …

[PDF][PDF] Survey of network-on-chip proposals

E Salminen, A Kulmala, TD Hamalainen - white paper, OCP-IP, 2008 - academia.edu
This paper gives an overview of state-of-the-art regarding the network-on-chip (NoC)
proposals. NoC paradigm replaces dedicated, design-specific wires with scalable, general …

Network-on-chip design and synthesis outlook

D Atienza, F Angiolini, S Murali, A Pullini, L Benini… - Integration, 2008 - Elsevier
With the growing complexity in consumer embedded products, new tendencies forecast
heterogeneous Multi-Processor Systems-On-Chip (MPSoCs) consisting of complex …

[КНИГА][B] Network-on-chip: the next generation of system-on-chip integration

S Kundu, S Chattopadhyay - 2014 - library.oapen.org
Addresses the Challenges Associated with System-on-Chip Integration Network-on-Chip:
The Next Generation of System-on-Chip Integration examines the current issues restricting …

Design automation for application-specific on-chip interconnects: A survey

A Cilardo, E Fusella - Integration, 2016 - Elsevier
On-chip interconnects provide a vital facility for highly parallel MultiProcessor Systems-on-
Chip, particularly in data-intensive applications, where the choice of the underlying …

An open-source platform for high-performance non-coherent on-chip communication

A Kurth, W Rönninger, T Benz… - IEEE Transactions …, 2021 - ieeexplore.ieee.org
On-chip communication infrastructure is a central component of modern systems-on-chip
(SoCs), and it continues to gain importance as the number of cores, the heterogeneity of …

Tile-based processor architecture model for high-efficiency embedded homogeneous multicore platforms

P Manet, B Rousseau - US Patent 9,275,002, 2016 - Google Patents
The present invention relates to a processor which comprises processing elements that
execute instructions in parallel and are connected together with point-to-point …

SysScale: Exploiting multi-domain dynamic voltage and frequency scaling for energy efficient mobile processors

J Haj-Yahya, M Alser, J Kim, AG Yağlıkçı… - 2020 ACM/IEEE 47th …, 2020 - ieeexplore.ieee.org
There are three domains in a modern thermally-constrained mobile system-on-chip (SoC):
compute, IO, and memory. We observe that a modern SoC typically allocates a fixed power …

Performance of LDPC codes under faulty iterative decoding

LR Varshney - IEEE Transactions on Information Theory, 2011 - ieeexplore.ieee.org
Departing from traditional communication theory where decoding algorithms are assumed to
perform without error, a system where noise perturbs both computational devices and …

[КНИГА][B] FPGAs: fundamentals, advanced features, and applications in industrial electronics

JJR Andina, E De la Torre Arnanz, MDV Peña - 2017 - taylorfrancis.com
Field Programmable Gate Arrays (FPGAs) are currently recognized as the most suitable
platform for the implementation of complex digital systems targeting an increasing number of …