Quantum-dot-based thermometry using 12-nm FinFET and machine learning models
In this work, we demonstrate the use of a bulk FinFET designed in a 12-nm CMOS
technology node, as a quantum dot (QD)-based thermometer at cryogenic temperatures …
technology node, as a quantum dot (QD)-based thermometer at cryogenic temperatures …
Compact model of a bulk FinFET quantum dot toward single chip integration of qubits and control electronics for quantum computing applications
In this work, we thoroughly investigate the drain current oscillations induced by quantum
confinement in short channel bulk FinFETs, while operating in coulomb blockade (CB) …
confinement in short channel bulk FinFETs, while operating in coulomb blockade (CB) …
Cryogenic temperature DC-IV measurements and compact modeling of n-channel bulk FinFETs with 3–4 nm wide fins and 20 nm gate length for quantum computing …
CMOS circuits for Quantum Computing applications require FETs operating at cryogenic
temperatures. In this work, we aim to present one of the first insights on the ability of the …
temperatures. In this work, we aim to present one of the first insights on the ability of the …
Random dopant, line-edge roughness, and gate workfunction variability in a nano InGaAs FinFET
A 3-D quantum-corrected drift-diffusion (DD) simulation study of three sources of statistical
variability, including discrete random dopants (RDs), line-edge roughness (LER), and metal …
variability, including discrete random dopants (RDs), line-edge roughness (LER), and metal …
Time-dependent dielectric breakdown in 45-nm PD-SOI N-channel FETs at cryogenic temperatures for quantum computing applications
The aim of this paper is to analyze the time-dependent dielectric breakdown (TDDB) in
MOSFETs at cryo temperatures deployed in control circuitry for quantum computing …
MOSFETs at cryo temperatures deployed in control circuitry for quantum computing …
Metal-gate granularity-induced threshold voltage variability and mismatch in Si gate-all-around nanowire n-MOSFETs
The metal-gate granularity-induced threshold voltage (VT) variability and VT mismatch in Si
gate-all-around (GAA) nanowire n-MOSFETs (n-NWFETs) are studied using coupled 3-D …
gate-all-around (GAA) nanowire n-MOSFETs (n-NWFETs) are studied using coupled 3-D …
Role of oxygen vacancy in the performance variability and lattice temperature of the stacked Nanosheet FET
RK Pandey - IEEE Access, 2024 - ieeexplore.ieee.org
We have carried out a detailed study of the impact of oxygen vacancies (O), on the
performance and the lattice temperature variation in a stacked silicon nanosheet field effect …
performance and the lattice temperature variation in a stacked silicon nanosheet field effect …
Narrow-width effects in 28-nm FD-SOI transistors operating at cryogenic temperatures
In this paper, we present on the cryogenic characterization of short channel 28-nm FD-SOI
nMOS and pMOS transistors having widths of the and at temperatures ranging from T= 300 …
nMOS and pMOS transistors having widths of the and at temperatures ranging from T= 300 …
A novel low power 4: 2 compressor using FinFET devices
The compressor is widely used in multi-operand addition, and multiplication. Enhancing the
performance of the compressor affects the capability of the multiplier, which influences the …
performance of the compressor affects the capability of the multiplier, which influences the …
Flicker Noise (1/f) in 45-nm PDSOI N-Channel FETs at Cryogenic Temperatures for Quantum Computing Applications
In this paper, we have investigated the flicker noise (1/) in 45-nm RFSOI NFETs for quantum
computing applications. 1/noise characterization and analysis were performed in linear …
computing applications. 1/noise characterization and analysis were performed in linear …