Low-power consumption is of utmost importance in modern digital systems-on-chip.
Approximate computing is a technique used in error-tolerant applications such as …

In this paper, we present a novel coarse-grained technique for monitoring online the bias
temperature instability (BTI) aging of circuits by exploiting their power gating infrastructure …

Scaling down of CMOS Technology reduces supply voltage which helps evade device botch
caused by high electric fields in the conducting channel under the gate and gate oxide …

This is a topic that receives a lot of interest since many applications of computer vision focus
on the detection of objects in visually appealing environments. Information about an object's …

Power gating is a very effective method in reducing the leakage energy during the standby
mode in VLSI circuits at the cost of increased circuit delay. This method has been well …

Memory block occupies most of the integrated chip area and an improvement in memory cell
performance will enhance the overall system performance. Ever increasing levels of on-chip …

A dual-mode controlled dc-dc controller with power over Ethernet (PoE) interface for power
device (PD) is presented that is designed to support drawing power either from an Ethernet …

Recently proposed power-gating structures for intermediate power-off modes offer
significant power saving benefits as they reduce the leakage power during short periods of …

Many multicore chips today employ advanced power management techniques. Multi-
threshold CMOS (MTCMOS) is very effective for reducing standby leakage power. Dynamic …

Due to the circuit aging effect, the minimum leakage vector (MLV) found by the traditional
input vector control method may not obtain the optimal leakage power reduction result when …