Computing technologies are currently based on the binary logic/number system, which is
dependent on the simple on and off switching mechanism of the prevailing transistors. With …

Multiple-valued logic (MVL) can lead to fewer interconnections inside and outside a chip. It
can also increase computational performance. Despite these intrinsic advantages, MVL …

A physically based compact analytical single electron transistor (SET) model is proposed for
hybrid CMOS-SET analog circuit simulation. The modeling approach is based on the" …

This paper proposes, for the first time, the concept of programmable logic circuit realized
with single-electron transistors (SETs). An SET having nonvolatile memory function is a key …

Analytical model for asymmetric single-electron tunneling transistors (SETTs), in which
resistance and capacitance parameters of source/drain junctions are not equal, has been …

New ternary adders, which are fundamental components of ternary addition, are presented
in this paper. They are on the basis of a logic style which mostly generates binary signals …

Technological advancement in chip development, primarily based on the downscaling of the
feature size of transistors, is threatening to come to a standstill as we approach the limits of …

Abstract Differential Cascode Voltage Switch (DCVS) is a well-known logic style, which
constructs robust and reliable circuits. Two main strategies are studied in this paper to form …

This paper presents low‐power circuits to implement ternary full adder (TFA) using carbon
nanotube field‐effect transistors (CNTFETs). Besides the unique characteristics of the CNTs …

Ternary logic has inherently the potential of high computational speed in comparison with
conventional binary logic. A new low-transistor-count, high-speed ternary half adder is …