A 23μW solar-powered keyword-spotting ASIC with ring-oscillator-based time-domain feature extraction

K Kim, C Gao, R Graça, I Kiselev… - … Solid-State Circuits …, 2022 - ieeexplore.ieee.org
Voice-controlled interfaces on acoustic Internet-of-Things (IoT) sensor nodes and mobile
devices require integrated low-power always-on wake-up functions such as Voice Activity …

A 23-μW Keyword Spotting IC With Ring-Oscillator-Based Time-Domain Feature Extraction

K Kim, C Gao, R Graca, I Kiselev… - IEEE Journal of Solid …, 2022 - ieeexplore.ieee.org
This article presents the first keyword spotting (KWS) IC that uses a ring-oscillator-based
time-domain processing technique for its analog feature extractor (FEx). Its extensive usage …

A 2-in-1 temperature and humidity sensor with a single FLL wheatstone-bridge front-end

H Jiang, CC Huang, MR Chan… - IEEE Journal of Solid …, 2020 - ieeexplore.ieee.org
This article presents a CMOS 2-in-1 relative humidity (RH) and temperature (Temp) sensor.
A single analog front-end (AFE) interfaces two on-chip transducers and converts the …

A 320-fs RMS jitter and–75-dBc reference-spur ring-DCO-based digital PLL using an optimal-threshold TDC

T Seong, Y Lee, S Yoo, J Choi - IEEE Journal of Solid-State …, 2019 - ieeexplore.ieee.org
This paper presents a ring-type, digitally controlled oscillator (DCO)-based integer-N digital
phase-locked loop (DPLL) that can achieve low jitter and low reference spur concurrently. In …

A 0.5-V 560-kHz 18.8-fJ/cycle on-chip oscillator with 96.1-ppm/° C steady-state stability using a duty-cycled digital frequency-locked loop

DS Truesdell, S Li, BH Calhoun - IEEE Journal of Solid-State …, 2021 - ieeexplore.ieee.org
On-chip oscillators are popular clocking solutions for a wide range of circuits and systems
due to their ease of integration and low form factor, but their energy efficiency is typically …

[HTML][HTML] Distributed Target Detection with Coherent Fusion in Tracking Based on Phase Prediction

A Wang, J Lu, S Zhou, L Wang - Remote Sensing, 2024 - mdpi.com
In distributed radar, a coherent system often gains attention for its higher detection potential
in contrast to its non-coherent counterpart. However, even for a distributed coherent radar, it …

An adaptive loop gain tracking digital PLL using spectrum-balancing technique

GY Su, ZH Kang, SI Liu - … on VLSI Design, Automation and Test …, 2021 - ieeexplore.ieee.org
A digital phase-locked loop (DPLL) using the proposed adaptive loop gain controller (ALGC)
is presented. The ALGC uses a spectrum-balancing technique to detect the difference of the …

3.2-GHz Digital Phase-Locked Loop With Autocorrelation-Based Direct Jitter Correction

G Park, S Yeom, IW Jang, D Lee, J Han… - IEEE Transactions on …, 2024 - ieeexplore.ieee.org
This brief solves the challenge of loop latency in the digital filter of conventional digital
phase-locked loops (DPLLs), which hinders timely updates of phase frequency detector …

A 1.22 mW 2.4 GHz PLL using a single-ring-oscillator-based integrator with background frequency calibration

GY Su, SI Liu - IEEE Transactions on Circuits and Systems I …, 2020 - ieeexplore.ieee.org
A phase-locked loop (PLL) using a single-ring-oscillator-based integrator with background
frequency calibration is presented. By introducing the single-ring-oscillator-based integrator …

An Injection-Locked and Sub-Sampling Clock Multiplier With a Two-Step SC DAC Achieving 2.67% Jitter Variation

Q Huang, S Huang, Y Chen, Y Fan… - IEEE Transactions on …, 2024 - ieeexplore.ieee.org
This article presents an injection-locked clock multiplier (ILCM) using a digitally controlled
frequency-tracking loop (FTL) with an integral two-step switched-capacitor (SC) digital-to …