A survey of SRAM-based in-memory computing techniques and applications
As von Neumann computing architectures become increasingly constrained by data-
movement overheads, researchers have started exploring in-memory computing (IMC) …
movement overheads, researchers have started exploring in-memory computing (IMC) …
A review on SRAM-based computing in-memory: Circuits, functions, and applications
Z Lin, Z Tong, J Zhang, F Wang, T Xu… - Journal of …, 2022 - iopscience.iop.org
Artificial intelligence (AI) processes data-centric applications with minimal effort. However, it
poses new challenges to system design in terms of computational speed and energy …
poses new challenges to system design in terms of computational speed and energy …
A reliable 8T SRAM for high-speed searching and logic-in-memory operations
To efficiently implement searching and logic functions with the SRAM-based in-memory
computing (IMC), we need to perform computations on bitlines (BLs)(called compute access) …
computing (IMC), we need to perform computations on bitlines (BLs)(called compute access) …
In Situ Storing 8T SRAM-CIM Macro for Full-Array Boolean Logic and Copy Operations
Computing in-memory (CIM) is a promising new computing method to solve problems
caused by von Neumann bottlenecks. It mitigates the need for transmitting large amounts of …
caused by von Neumann bottlenecks. It mitigates the need for transmitting large amounts of …
Fundamental limits on energy-delay-accuracy of in-memory architectures in inference applications
This article obtains fundamental limits on the computational precision of in-memory
computing architectures (IMCs). An IMC noise model and associated signal-to-noise ratio …
computing architectures (IMCs). An IMC noise model and associated signal-to-noise ratio …
Enabling energy-efficient in-memory computing with robust assist-based reconfigurable sense amplifier in SRAM array
With the increasing gap between processing speed and memory bandwidth necessity for
in/near-memory computing has emerged, to ensure high-performance, energy-efficient …
in/near-memory computing has emerged, to ensure high-performance, energy-efficient …
A 16.38 TOPS and 4.55 POPS/W SRAM Computing-in-Memory Macro for Signed Operands Computation and Batch Normalization Implementation
Edge artificial intelligence applications impose rigorous demands on local hardware to
improve throughput and energy efficiency. Computing-in-memory (CIM) architectures …
improve throughput and energy efficiency. Computing-in-memory (CIM) architectures …
Analysis and design of reconfigurable sense amplifier for compute SRAM with high-speed compute and normal read access
A compute SRAM requires high speed for both compute access and normal read access.
However, it presents a very distinct bitline discharging behavior in these two modes, thus …
However, it presents a very distinct bitline discharging behavior in these two modes, thus …
A 9T-SRAM based computing-in-memory with redundant unit and digital operation for boolean logic and MAC
X Li, M Gao, Z Ren, K Yu, W Lu, C Dai, W Hu… - Microelectronics …, 2024 - Elsevier
The proposal of compute-in-memory (CIM) is a breakthrough for the traditional von
Neumann architecture to achieve efficient computing research. This architecture has unique …
Neumann architecture to achieve efficient computing research. This architecture has unique …
Configurable memory with a multilevel shared structure enabling in-memory computing
Frequent to-and-from data transfers in the von Neumann architecture limit the overall
throughput. One of the promising approaches used to overcome von Neumann bottleneck is …
throughput. One of the promising approaches used to overcome von Neumann bottleneck is …