Surface acoustic wave (SAW) resonator having trap-rich region

SR Gilbert, RC Ruby - US Patent 10,541,667, 2020 - Google Patents
(57) ABSTRACT A surface acoustic wave (SAW) resonator device includes a semiconductor
substrate having a first surface and a second surface. The semiconductor substrate …

New substrate passivation method dedicated to HR SOI wafer fabrication with increased substrate resistivity

D Lederer, JP Raskin - IEEE Electron Device Letters, 2005 - ieeexplore.ieee.org
We propose in this letter a new passivation method to get rid of parasitic surface conduction
in oxidized high resistivity (HR) silicon and HR silicon-on-insulator (SOI) wafers. The method …

Surface-acoustic-wave devices based on lithium niobate and amorphous silicon thin films on a silicon substrate

Y Yang, L Gao, S Gong - IEEE Transactions on Microwave …, 2022 - ieeexplore.ieee.org
This work presents an acoustic platform using solidly mounted thin-oriented lithium niobate
(LiNbO3) film on silicon (Si). A thin layer of amorphous Si eliminates a conductive layer …

[LIBRO][B] Silicon Heterostructure Handbook: Materials, Fabrication, Devices, Circuits and Applications of SiGe and Si Strained-Layer Epitaxy

JD Cressler, S Monfray, G Freeman, D Friedman… - 2018 - taylorfrancis.com
An extraordinary combination of material science, manufacturing processes, and innovative
thinking spurred the development of SiGe heterojunction devices that offer a wide array of …

Encapsulated dies with enhanced thermal performance

TS Morris, D Jandzinski, S Parker, J Chadwick… - US Patent …, 2017 - Google Patents
The present disclosure relates to enhancing the thermal performance of encapsulated flip
chip dies. According to an exemplary process, a plurality of flip chip dies are attached on a …

Effective resistivity of fully-processed SOI substrates

D Lederer, JP Raskin - Solid-State Electronics, 2005 - Elsevier
We introduce in this work a new quality factor called effective resistivity (ρeff), which is used
to characterize and fairly compare the substrate resistivity of fully processed SOI wafers. The …

Method of manufacture for a silicon-on-plastic semiconductor device with interfacial adhesion layer

JC Costa - US Patent 9,812,350, 2017 - Google Patents
(57) ABSTRACT A semiconductor device and methods for manufacturing the same are
disclosed. The semiconductor device includes a polymer substrate and an interfacial layer …

Flip chip module with enhanced properties

JC Costa, TS Morris, JH Hammond… - US Patent …, 2018 - Google Patents
A flip chip module having at least one flip chip die is disclosed. The flip chip module includes
a carrier having a top surface with a first mold compound residing on the top surface. A first …

Silicon-on-plastic semiconductor device and method of making the same

JC Costa, DM Shuttleworth, MJ Antonell - US Patent 9,583,414, 2017 - Google Patents
A semiconductor device that does not produce nonlinearities attributed to a high resistivity
silicon handle interfaced with a dielectric region of a buried oxide (BOX) layer is disclosed …

Method for manufacturing an integrated circuit package

JC Costa, G Maxim, DRW Leipold, B Scott - US Patent 10,085,352, 2018 - Google Patents
This disclosure relates to integrated circuit (IC) packages and methods of manufacturing the
same. In one method, a printed circuit board is provided with semiconductor die. The …