Hardware Moving Target Defenses against Physical Attacks: Design Challenges and Opportunities
The concept of moving target defense (MTD) has entrenched itself as a viable strategy to
reverse the typical asymmetries in cyber warfare. MTDs are technologies that seek to make …
reverse the typical asymmetries in cyber warfare. MTDs are technologies that seek to make …
Review of gate‐level differential power analysis and fault analysis countermeasures
Hardware implementation of modern crypto devices paves the way for a special type of
cryptanalysis, which is known as side channel analysis (SCA) attacks. These attacks are …
cryptanalysis, which is known as side channel analysis (SCA) attacks. These attacks are …
Dual-hiding side-channel-attack resistant FPGA-based asynchronous-logic AES: Design, countermeasures and evaluation
KS Chong, JS Ng, J Chen, NKZ Lwin… - IEEE Journal on …, 2021 - ieeexplore.ieee.org
We present a side-channel-attack (SCA) resistant asynchronous-logic (async-logic)
Advanced Encryption Standard (AES) accelerator with dual-hiding SCA countermeasures, ie …
Advanced Encryption Standard (AES) accelerator with dual-hiding SCA countermeasures, ie …
A highly secure FPGA-based dual-hiding asynchronous-logic AES accelerator against side-channel attacks
JS Ng, J Chen, KS Chong, JS Chang… - IEEE Transactions on …, 2022 - ieeexplore.ieee.org
Encryption in field-programmable gate array (FPGA) often provides a good security solution
to protect data privacy in Internet-of-Things systems, but this security solution can be …
to protect data privacy in Internet-of-Things systems, but this security solution can be …
Assessment of Hiding the Higher-Order Leakages in Hardware: What Are the Achievements Versus Overheads?
Higher-order side-channel attacks are becoming amongst the major interests of academia
as well as industry sector. It is indeed being motivated by the development of …
as well as industry sector. It is indeed being motivated by the development of …
Your rails cannot hide from localized EM: How dual-rail logic fails on FPGAs
Protecting cryptographic implementations against side-channel attacks is a must to prevent
leakage of processed secrets. As a cell-level countermeasure, so called DPA-resistant logic …
leakage of processed secrets. As a cell-level countermeasure, so called DPA-resistant logic …
GliFreD: Glitch-free duplication towards power-equalized circuits on FPGAs
Designers of secure hardware are required to harden their implementations against physical
threats, such as power analysis attacks. In particular, cryptographic hardware circuits need …
threats, such as power analysis attacks. In particular, cryptographic hardware circuits need …
Early propagation and imbalanced routing, how to diminish in FPGAs
This work deals with DPA-resistant logic styles, ie, cell-level countermeasures against power
analysis attacks that are known as a serious threat to cryptographic devices. Early …
analysis attacks that are known as a serious threat to cryptographic devices. Early …
Hardware architecture implemented on FPGA for protecting cryptographic keys against side-channel attacks
R Lumbiarres-Lopez, M Lopez-Garcia… - … on Dependable and …, 2016 - ieeexplore.ieee.org
This paper presents a new hardware architecture designed for protecting the key of
cryptographic algorithms against attacks by side-channel analysis (SCA). Unlike previous …
cryptographic algorithms against attacks by side-channel analysis (SCA). Unlike previous …
A Systematic Literature Review on Vulnerabilities, Mitigation Techniques, and Attacks in Field-Programmable Gate Arrays
A Alsuwaiyan, AA Habib, AB Imoukhuede… - Arabian Journal for …, 2025 - Springer
This paper presents a systematic literature review (SLR) of the vulnerabilities of field-
programmable gate arrays (FPGAs), based on 51 carefully selected articles from a pool of …
programmable gate arrays (FPGAs), based on 51 carefully selected articles from a pool of …