A high performance CMOS voltage reference in one simple circuit

Q Chen, J **e, H Qiu, J Li, Z Luo - AEU-International Journal of Electronics …, 2024 - Elsevier
This article introduces a novel CMOS threshold voltage reference with low temperature
coefficient (TC) and high power supply rejection ratio (PSRR). A novel structure consisting of …

A two-stage sub-threshold voltage reference generator using body bias curvature compensation for improved temperature coefficient

M Azimi, M Habibi, P Crovetti - Electronics, 2024 - mdpi.com
Leakage diodes cause deviations in the thermal drift of ultra-low-power two-transistor (2T)
reference circuits, resulting in either convex or concave output voltages against temperature …

A 0.000747%/V, 64.59 dB PSRR CMOS-only voltage reference for ultra-low power WSN applications

S Dong, J Li, S Bu, C Liu, X Tong - AEU-International Journal of Electronics …, 2022 - Elsevier
An ultra-low power voltage reference with ultra-low line sensitivity (LS) and high power
supply reject ratio (PSRR) for wireless sensor network (WSN) applications is proposed in …

A 11.42-ENOB 6.02 fJ/conversion-step SAR-assisted digital-slope ADC with a reset-in-time VCO-based comparator for power reduction

X Tong, Y Hu, X **n, C Zhang, Q Li - AEU-International Journal of …, 2022 - Elsevier
A successive approximation register (SAR)-assisted digital-slope analog-to-digital converter
(ADC) with an “8-bit+ 4-bit” hybrid topology is presented. In the coarse quantization with an 8 …

Picowatt Dual-Output Voltage Reference Based on Leakage Current Compensation and Diode-Connected Voltage Divider

Y Huang, Y Luo, Y Zeng - Electronics, 2024 - search.proquest.com
A picowatt CMOS voltage reference with dual outputs is proposed and simulated in this
paper based on a standard 65 nm process. To compensate for the leakage current caused …

Ultra-low-power CMOS voltage references: Analysis and optimization regarding technology node

F Olivera, A Petraglia - AEU-International Journal of Electronics and …, 2023 - Elsevier
Abstract Ultra-low-power (ULP) and ultra-low-voltage (ULV) designs have received more
attention due to the fact that self-powered systems are potential candidates for enhancing …

An 8.25 b-ENOB 100kSps 290fJ-FoM asynchronous SAR capacitance to digital converter

TM Vo - AEU-International Journal of Electronics and …, 2022 - Elsevier
This paper presents a low-power asynchronous capacitance to digital converter achieving
8.25-bit Effective Number of Bits (ENOB), and 290-fJ/conversion. step Figure of Merit (FoM) …

pMOS‐only pW‐power voltage reference with sub‐10 ppm/° C trimmed temperature coefficient and sub‐100 ppm/V line sensitivity

M Azimi, M Habibi, P Crovetti - International Journal of Circuit …, 2023 - Wiley Online Library
In this paper, a new ultra‐low‐power voltage reference based on a two‐stage, all‐pMOS
topology operating in the subthreshold region is proposed to uniquely meet the pW‐power …

A CMOS voltage reference with low temperature coefficient

H Qiu, Q Chen, L He, B Zheng, J Li, Z Luo - AEU-International Journal of …, 2025 - Elsevier
This article introduces a CMOS voltage reference with low temperature coefficient (TC), high
power supply rejection ratio (PSRR). A new self-biasing loop is proposed to generate a zero …

Performance Comparison of CMOS Based Voltage Reference Circuits in 180nm Technology

K Kumar, M Kumar, M Jhamb - 2023 9th International …, 2023 - ieeexplore.ieee.org
The accurate and stable generation of reference voltages is vital in low power VLSI circuit
applications. In this paper, a performance comparison of CMOS-based voltage reference …