(57) ABSTRACT A method of manufacturing a memory device includes: providing a
substrate; forming in a cell region a channel extending in a direction perpendicular to an …

(57) ABSTRACT A first insulating interlayer is formed on a substrate including first and
second regions. The first insulating interlayer has top surface, a height of which is greater in …

According to one embodiment, the stair array includes a deep portion, one stair, and a
plurality of Stairs. The one stair is provided next to the deepest portion in the first direction …

US10177160B2 - Semiconductor device and method of fabricating the same - Google
Patents US10177160B2 - Semiconductor device and method of fabricating the same …

(57) ABSTRACT A nonvolatile memory device including a substrate which includes a cell
array region and a connection region, an electrode structure formed on the cell array region …

A semiconductor memory device according to an embodiment includes a substrate; a plate-
like first conductivity layer provided above the substrate and extending parallel to a substrate …

(57) ABSTRACT A semiconductor device may include a cell gate conductive pattern in a cell
array area that extends to a step area, a cell vertical structure in the cell array area that …

A semiconductor device including an insulating cap** structure is provided. The
semiconductor device may include a plurality of gate electrodes vertically stacked on a …

A three-dimensional semiconductor memory device including a peripheral circuit structure
on a first substrate, the peripheral circuit structure including peripheral circuits, a second …

A semiconductor device includes a substrate, a peripheral structure, a lower insulating layer,
and a stack. The substrate includes a peripheral circuit region and a cell array region. The …