The programmable data plane: Abstractions, architectures, algorithms, and applications

O Michel, R Bifulco, G Retvari, S Schmid - ACM Computing Surveys …, 2021 - dl.acm.org
Programmable data plane technologies enable the systematic reconfiguration of the low-
level processing steps applied to network packets and are key drivers toward realizing the …

Design guidelines for high performance {RDMA} systems

A Kalia, M Kaminsky, DG Andersen - 2016 USENIX Annual Technical …, 2016 - usenix.org
Modern RDMA hardware offers the potential for exceptional performance, but design
choices including which RDMA operations to use and how to use them significantly affect …

[PDF][PDF] Maglev: A fast and reliable software network load balancer.

DE Eisenbud, C Yi, C Contavalli, C Smith, R Kononov… - Nsdi, 2016 - usenix.org
Maglev is Google's network load balancer. It is a large distributed software system that runs
on commodity Linux servers. Unlike traditional hardware network load balancers, it does not …

Fast packet processing: A survey

D Cerović, V Del Piccolo, A Amamou… - … Surveys & Tutorials, 2018 - ieeexplore.ieee.org
The exponential growth of data traffic, which is not expected to stop anytime soon, brought
about a vast amount of advancements in the networking field. Latest network interfaces …

[PDF][PDF] SoftNIC: A software NIC to augment hardware

S Han, K Jang, A Panda, S Palkar… - … , Tech. Rep. UCB …, 2015 - courses.engr.illinois.edu
As the main gateway for network traffic to a server, the network interface card (NIC) is an
ideal place to incorporate diverse network functionality, such as traffic control, protocol …

Survey of performance acceleration techniques for network function virtualization

L Linguaglossa, S Lange, S Pontarelli… - Proceedings of the …, 2019 - ieeexplore.ieee.org
The ongoing network softwarization trend holds the promise to revolutionize network
infrastructures by making them more flexible, reconfigurable, portable, and more adaptive …

A survey on the programmable data plane: Abstractions, architectures, and open problems

R Bifulco, G Rétvári - 2018 IEEE 19th International Conference …, 2018 - ieeexplore.ieee.org
Programmable switches allow the packet processing behavior to be applied to transmitted
packets, including the type, sequence, and semantics of processing operations, to be …

{APUNet}: Revitalizing {GPU} as packet processing accelerator

Y Go, MA Jamshed, YG Moon, C Hwang… - 14th USENIX Symposium …, 2017 - usenix.org
Many research works have recently experimented with GPU to accelerate packet processing
in network applications. Most works have shown that GPU brings a significant performance …

High-speed software data plane via vectorized packet processing

D Barach, L Linguaglossa, D Marion… - IEEE …, 2018 - ieeexplore.ieee.org
In the last decade, a number of frameworks started to appear that implement, directly in
userspace with kernel-bypass mode, high-speed software data plane functionalities on …

{G-NET}: Effective {GPU} Sharing in {NFV} Systems

K Zhang, B He, J Hu, Z Wang, B Hua, J Meng… - … USENIX Symposium on …, 2018 - usenix.org
Network Function Virtualization (NFV) virtualizes software network functions to offer flexibility
in their design, management and deployment. Although GPUs have demonstrated their …