Physics-inspired neural networks for efficient device compact modeling
We present a novel physics-inspired neural network (Pi-NN) approach for compact
modeling. Development of high-quality compact models for devices is a key to connect …
modeling. Development of high-quality compact models for devices is a key to connect …
Efficient and realistic device modeling from atomic detail to the nanoscale
As semiconductor devices scale to new dimensions, the materials and designs become
more dependent on atomic details. NEMO5 is a nanoelectronics modeling package …
more dependent on atomic details. NEMO5 is a nanoelectronics modeling package …
Dramatic impact of dimensionality on the electrostatics of PN junctions and its sensing and switching applications
Low-dimensional material systems provide a unique set of properties useful for solid-state
devices. The building block of these devices is the pn junction. In this paper, we present a …
devices. The building block of these devices is the pn junction. In this paper, we present a …
Neuroevolution-based efficient field effect transistor compact device models
Artificial neural networks (ANN) and multilayer perceptrons (MLP) have proved to be efficient
in terms of designing highly accurate semiconductor device compact models (CM). Their …
in terms of designing highly accurate semiconductor device compact models (CM). Their …
From Fowler–Nordheim to nonequilibrium Green's function modeling of tunneling
In this paper, an analytic model is proposed, which provides, in a continuous manner, the
current–voltage (–) characteristic of high-performance tunneling FETs (TFETs) based on …
current–voltage (–) characteristic of high-performance tunneling FETs (TFETs) based on …
Can homojunction tunnel FETs scale below 10 nm?
H Ilatikhameneh, G Klimeck… - IEEE Electron Device …, 2015 - ieeexplore.ieee.org
The main promise of tunnel FETs (TFETs) is to enable supply voltage (V DD) scaling in
conjunction with dimension scaling of transistors to reduce power consumption. However …
conjunction with dimension scaling of transistors to reduce power consumption. However …
Sensitivity challenge of steep transistors
Steep transistors are crucial in lowering power consumption of the ICs. However, the
difficulties in achieving steepness beyond the Boltzmann limit experimentally have hindered …
difficulties in achieving steepness beyond the Boltzmann limit experimentally have hindered …
Alloy engineered nitride tunneling field-effect transistor: A solution for the challenge of heterojunction tfets
Being fundamentally limited to a current-voltage steepness of 60mV/dec, MOSFETs struggle
to operate below 0.6 V. Further reduction in V DD and, consequently, power consumption …
to operate below 0.6 V. Further reduction in V DD and, consequently, power consumption …
Mode-space-compatible inelastic scattering in atomistic nonequilibrium Green's function implementations
The nonequilibrium Green's function method is often used to predict transport in atomistically
resolved nanodevices and yields an immense numerical load when inelastic scattering on …
resolved nanodevices and yields an immense numerical load when inelastic scattering on …
Design rules for high performance tunnel transistors from 2-D materials
H Ilatikhameneh, G Klimeck… - IEEE Journal of the …, 2016 - ieeexplore.ieee.org
Tunneling field-effect transistors (TFETs) based on 2-D materials are promising steep sub-
threshold swing devices due to their tight gate control. There are two major methods to …
threshold swing devices due to their tight gate control. There are two major methods to …