Microarchitecture-aware timing error prediction via deep neural networks

S Tompazi, G Karakonstantis - … on On-Line Testing and Robust …, 2023 - ieeexplore.ieee.org
Nanometer circuits are becoming increasingly prone to timing errors due to worsening
parametric variations and operation close to voltage and frequency limits. Such errors …

[PDF][PDF] Microarchitecture and Workload-Aware Error Prediction

S Tompazi - 2024 - pure.qub.ac.uk
In 1975, Moore observed that the complexity of integrated circuits would double every two
years towards the end of the decade, instead of every year [83]. He predicted that this would …