High-Throughput Accelerator for Exact-MMSE Soft-Output Detection in Open RAN Systems
Open Radio Access Networks (Open RANs), realized fully in software, require excessive
computing resources to support time-sensitive signal-processing algorithms in the physical …
computing resources to support time-sensitive signal-processing algorithms in the physical …
Enabling Efficient Hybrid Systolic Computation in Shared L1-Memory Manycore Clusters
Systolic arrays and shared L1-memory manycore clusters are commonly used architectural
paradigms that offer different trade-offs to accelerate parallel workloads. While the first excel …
paradigms that offer different trade-offs to accelerate parallel workloads. While the first excel …
MX: Enhancing RISC-V's Vector ISA for Ultra-Low Overhead, Energy-Efficient Matrix Multiplication
Dense Matrix Multiplication (MatMul) is arguably one of the most ubiquitous compute-
intensive kernels, spanning linear algebra, DSP, graphics, and machine learning …
intensive kernels, spanning linear algebra, DSP, graphics, and machine learning …
ParaBase: A Configurable Parallel Baseband Processor for Ultra-High-Speed Inter-Satellite Optical Communications
This paper presents ParaBase, a configurable baseband processing architecture that
efficiently handles parallel sample streams targeting ultra-wide bandwidth inter-satellite …
efficiently handles parallel sample streams targeting ultra-wide bandwidth inter-satellite …
A 1024 RV-Cores Shared-L1 Cluster with High Bandwidth Memory Link for Low-Latency 6G-SDR
We introduce an open-source architecture for next-generation Radio-Access Network
baseband processing: 1024 latency-tolerant 32-bit RISC-V cores share 4 MiB of L1 memory …
baseband processing: 1024 latency-tolerant 32-bit RISC-V cores share 4 MiB of L1 memory …
5G Channel Estimation Kernels on RISC-V Vector Digital Signal Processors
Each generation of the wireless communication networks has contiguous demands for
higher computing capabilities and lower the power consumption in the integrated circuitry …
higher computing capabilities and lower the power consumption in the integrated circuitry …
[BOOK][B] Fighting Back the Von Neumann Bottleneck with Small-and Large-Scale Vector Microprocessors
M Cavalcante - 2023 - books.google.com
In his seminal Turing Award Lecture, Backus discussed the issues stemming from the word-
at-a-time style of programming inherited from the von Neumann computer. More than forty …
at-a-time style of programming inherited from the von Neumann computer. More than forty …
[PDF][PDF] MASTER
E Nihl, E de Bruijckere - diva-portal.org
As the world becomes more globalised, user equipment such as smartphones and Internet
of Things devices require increasingly more data, which increases the demand for wireless …
of Things devices require increasingly more data, which increases the demand for wireless …