Traditionally, work on analog testing has focused on diagnosing faults in board designs.
Recently, with increasing levels of integration, not just diagnosing faults, but distinguishing …

A large-scale monolithic silicon nanophotonic phased array on a chip creates and
dynamically steers a high-resolution optical beam in free space, enabling emerging …

Several classifications exist of Nyquist-rate analog-to-digital converters. In this chapter the
converters are subdivided in parallel search, sequential search, and linear search. Each of …

The selection of drain current, inversion coefficient, and channel length for each MOS device
in an analog circuit results in significant tradeoffs in performance. The selection of inversion …

Statistical Analysis and Optimization For VLSI: Timing and Power is a state-of-the-art book
on the newly emerging field of statistical computer-aided design (CAD) tools. The very latest …

Based on the authors' expansive collection of notes taken over the years, Nano-CMOS
Circuit and Physical Design bridges the gap between physical and circuit design and …

In this paper, a physics-based mismatch model is presented. It is demonstrated on a 0.18-
/spl mu/m technology that a simple mismatch model can still be used to characterize deep …

A unified, comprehensive approach to the design of continuous-time (CT) and discrete-time
(DT) cellular neural networks (CNNs) using CMOS current-mode analog techniques is …

Analog testing is a difficult task without a clearcut methodology. Analog circuits are tested for
satisfying their specifications, not for faults. Given the high cost of testing analog …

Many components of variability become larger percentage design factors with decreasing
feature size. Hence, the small transistors in SRAM cells are particularly sensitive to these …