An integrated circuit enabling asynchronous data communi cation is disclosed. The
integrated circuit comprises a plural ity of circuit blocks, each circuit block of the plurality of …

2. Description of Related Art In modem high frequency integrated circuits, the valid data
window in which signal inputs are valid for sampling by a clock is continually shrinking as …

US PATENT DOCUMENTS 5,920,899 A T. 1999 Chu 5,949,259 A 9, 1999 Garcia 5,973,512
A 10, 1999 Baker 6,038,656 A 3, 2000 Martin et al. 6,152.613 A 11/2000 Martin et al …

An integrated circuit includes a plurality of processing stages each including processing
logic 1014, a non-delayed signal-capture element 1016, a delayed signal-capture ele ment …

4,875.224. A 10/1989 Simpson includes a plurality of pipelines across a plurality of levels.
49 1 23 48 A 3, 1990 Maki etal Using a linear programming technique, a minimal number of …

The present invention comprises a system and method for simultaneously measuring the
pCO and pC) of a patients and plotting of the ratio of CO/O instantaneously (hereinafter …

6,622,273 B1 9, 2003 Barnes replaced with a plurality of handshaking circuits. Data valid ity
is encoded into a communication path between a first pipeline stage and a second pipeline …

US7504851B2 - Fault tolerant asynchronous circuits - Google Patents US7504851B2 - Fault
tolerant asynchronous circuits - Google Patents Fault tolerant asynchronous circuits Download …

5, 291496 A 3, 1994 Andaleon et al. 7,594,150 B2 9/2009 Chakraborty et al. 5.313. 625 A 5,
1994 Hess etal 7,650,551 B2 1, 2010 Flautner et al. 5.33705 A 6, 1994 Gould et al …

US8650470B2 - Error recovery within integrated circuit - Google Patents US8650470B2 -
Error recovery within integrated circuit - Google Patents Error recovery within integrated circuit …