Electrical-level attacks on CPUs, FPGAs, and GPUs: Survey and implications in the heterogeneous era

DG Mahmoud, V Lenders, M Stojilović - ACM Computing Surveys (CSUR …, 2022 - dl.acm.org
Given the need for efficient high-performance computing, computer architectures combining
central processing units (CPUs), graphics processing units (GPUs), and field-programmable …

Leakage assessment methodology: A clear roadmap for side-channel evaluations

T Schneider, A Moradi - … Hardware and Embedded Systems--CHES 2015 …, 2015 - Springer
Evoked by the increasing need to integrate side-channel countermeasures into security-
enabled commercial devices, evaluation labs are seeking a standard approach that enables …

The temperature side channel and heating fault attacks

M Hutter, JM Schmidt - Smart Card Research and Advanced Applications …, 2014 - Springer
In this paper, we present practical results of data leakages of CMOS devices via the
temperature side channel—a side channel that has been widely cited in literature but not …

How (not) to use welch's t-test in side-channel security evaluations

FX Standaert - Smart Card Research and Advanced Applications: 17th …, 2019 - Springer
Abstract The Test Vector Leakage Assessment (TVLA) methodology is a qualitative tool
relying on Welch's T-test to assess the security of cryptographic implementations against …

From improved leakage detection to the detection of points of interests in leakage traces

F Durvaux, FX Standaert - … in Cryptology–EUROCRYPT 2016: 35th Annual …, 2016 - Springer
Leakage detection usually refers to the task of identifying data-dependent information in side-
channel measurements, independent of whether this information can be exploited. Detecting …

Leakage assessment methodology: Extended version

T Schneider, A Moradi - Journal of Cryptographic Engineering, 2016 - Springer
Evoked by the increasing need to integrate side-channel countermeasures into security-
enabled commercial devices, evaluation labs are seeking a standard approach that enables …

An experimental study of reduced-voltage operation in modern FPGAs for neural network acceleration

B Salami, EB Onural, IE Yuksel, F Koc… - 2020 50th Annual …, 2020 - ieeexplore.ieee.org
We empirically evaluate an undervolting technique, ie, underscaling the circuit supply
voltage below the nominal level, to improve the power-efficiency of Convolutional Neural …

Does coupling affect the security of masked implementations?

T De Cnudde, B Bilgin, B Gierlichs, V Nikov… - … Side-Channel Analysis …, 2017 - Springer
Masking schemes achieve provable security against side-channel analysis by using secret
sharing to decorrelate key-dependent intermediate values of the cryptographic algorithm …

Leaky wires: Information leakage and covert communication between FPGA long wires

I Giechaskiel, KB Rasmussen, K Eguro - … of the 2018 on Asia Conference …, 2018 - dl.acm.org
Field-Programmable Gate Arrays (FPGAs) are integrated circuits that implement
reconfigurable hardware. They are used in modern systems, creating specialized, highly …

Leakier wires: Exploiting FPGA long wires for covert-and side-channel attacks

I Giechaskiel, K Eguro, KB Rasmussen - ACM Transactions on …, 2019 - dl.acm.org
In complex FPGA designs, implementations of algorithms and protocols from third-party
sources are common. However, the monolithic nature of FPGAs means that all sub-circuits …