Safe limits on voltage reduction efficiency in GPUs: A direct measurement approach

J Leng, A Buyuktosunoglu, R Bertran, P Bose… - Proceedings of the 48th …, 2015 - dl.acm.org
Energy efficiency of GPU architectures has emerged as an important aspect of computer
system design. In this paper, we explore the energy benefits of reducing the GPU chip's …

An experimental study of reduced-voltage operation in modern FPGAs for neural network acceleration

B Salami, EB Onural, IE Yuksel, F Koc… - 2020 50th Annual …, 2020 - ieeexplore.ieee.org
We empirically evaluate an undervolting technique, ie, underscaling the circuit supply
voltage below the nominal level, to improve the power-efficiency of Convolutional Neural …

Adaptive voltage/frequency scaling and core allocation for balanced energy and performance on multicore cpus

G Papadimitriou, A Chatzidimitriou… - … symposium on high …, 2019 - ieeexplore.ieee.org
Energy efficiency is a known major concern for computing system designers. Significant
effort is devoted to power optimization of modern systems, especially in large-scale …

Architecting waferscale processors-a GPU case study

S Pal, D Petrisko, M Tomei, P Gupta… - … Symposium on High …, 2019 - ieeexplore.ieee.org
Increasing communication overheads are already threatening computer system scaling. One
approach to dramatically reduce communication overheads is waferscale processing …

Exceeding conservative limits: A consolidated analysis on modern hardware margins

G Papadimitriou, A Chatzidimitriou… - … on Device and …, 2020 - ieeexplore.ieee.org
Modern large-scale computing systems (data centers, supercomputers, cloud and edge
setups and high-end cyber-physical systems) employ heterogeneous architectures that …

Understanding power consumption and reliability of high-bandwidth memory with voltage underscaling

SSN Larimi, B Salami, OS Unsal… - … , Automation & Test …, 2021 - ieeexplore.ieee.org
Modern computing devices employ High-Bandwidth Memory (HBM) to meet their memory
bandwidth requirements. An HBM-enabled device consists of multiple DRAM layers stacked …

Regless: Just-in-time operand staging for GPUs

J Kloosterman, J Beaumont, DA Jamshidi… - Proceedings of the 50th …, 2017 - dl.acm.org
The register file is one of the largest and most power-hungry structures in a Graphics
Processing Unit (GPU), because massive multithreading requires all the register state for …

[HTML][HTML] Shift-and-Safe: Addressing permanent faults in aggressively undervolted CNN accelerators

Y Toca-Díaz, RG Tejero, A Valero - Journal of Systems Architecture, 2024 - Elsevier
Underscaling the supply voltage (V dd) to ultra-low levels below the safe-operation
threshold voltage (V min) holds promise for substantial power savings in digital CMOS …

Modern hardware margins: CPUs, GPUs, FPGAs recent system-level studies

D Gizopoulos, G Papadimitriou… - 2019 IEEE 25th …, 2019 - ieeexplore.ieee.org
Modern large-scale computing systems (data centers, supercomputers, cloud and edge
setups and high-end cyber-physical systems) employ heterogeneous architectures that …

Asymmetric resilience: Exploiting task-level idempotency for transient error recovery in accelerator-based systems

J Leng, A Buyuktosunoglu, R Bertran… - … Symposium on High …, 2020 - ieeexplore.ieee.org
Accelerators make the task of building systems that are re-silient against transient errors like
voltage noise and soft errors hard. Architects integrate accelerators into the system as black …