Stochastic charge trap** in oxides: From random telegraph noise to bias temperature instabilities

T Grasser - Microelectronics Reliability, 2012 - Elsevier
Charge trap** at oxide defects fundamentally affects the reliability of MOS transistors. In
particular, charge trap** has long been made responsible for random telegraph and 1/f …

Identification of oxide defects in semiconductor devices: A systematic approach linking DFT to rate equations and experimental evidence

W Goes, Y Wimmer, AM El-Sayed, G Rzepa… - Microelectronics …, 2018 - Elsevier
It is well-established that oxide defects adversely affect functionality and reliability of a wide
range of microelectronic devices. In semiconductor-insulator systems, insulator defects can …

Review on SiC MOSFETs high-voltage device reliability focusing on threshold voltage instability

K Puschkarsky, T Grasser, T Aichinger… - … on Electron Devices, 2019 - ieeexplore.ieee.org
An overview over issues and findings in SiC power MOSFET reliability is given. The focus of
this article is on threshold instabilities and the differences to Si power MOSFETs …

The paradigm shift in understanding the bias temperature instability: From reaction–diffusion to switching oxide traps

T Grasser, B Kaczer, W Goes… - … on Electron Devices, 2011 - ieeexplore.ieee.org
One of the most important degradation modes in CMOS technologies, the bias temperature
instability (BTI) has been known since the 1960s. Already in early interpretations, charge …

Analog Circuits and Signal Processing

M Ismail, M Sawan - 2013 - Springer
Today, micro-electronic circuits are undeniably and ubiquitously present in our society.
Transportation vehicles such as cars, trains, buses, and airplanes make abundant use of …

Understanding BTI in SiC MOSFETs and its impact on circuit operation

K Puschkarsky, H Reisinger, T Aichinger… - … on device and …, 2018 - ieeexplore.ieee.org
The threshold voltage hysteresis in SiC power MOSFETs is rarely studied. This paper
investigates the captureand emission-time constants of positive and negative charge …

Atomistic approach to variability of bias-temperature instability in circuit simulations

B Kaczer, S Mahato… - 2011 International …, 2011 - ieeexplore.ieee.org
A blueprint for an atomistic approach to introducing time-dependent variability into a circuit
simulator in a realistic manner is demonstrated. The approach is based on previously …

Impact of single charged gate oxide defects on the performance and scaling of nanoscaled FETs

J Franco, B Kaczer, M Toledano-Luque… - 2012 IEEE …, 2012 - ieeexplore.ieee.org
We report extensive statistical NBTI reliability measurements of nanoscaled FETs of different
technologies, based on which we propose a 1/area scaling rule for the statistical impact of …

Understanding and modeling transient threshold voltage instabilities in SiC MOSFETs

K Puschkarsky, T Grasser, T Aichinger… - 2018 IEEE …, 2018 - ieeexplore.ieee.org
Modeling of the threshold voltage instabilities in SiC power MOSFETs is difficult due to the
fast recovery of ΔV th after positive and negative gate bias stress. This work investigates the …

Computer-aided analog circuit design for reliability in nanometer CMOS

E Maricau, G Gielen - IEEE Journal on Emerging and Selected …, 2011 - ieeexplore.ieee.org
Integrated analog circuit design in nanometer CMOS technologies brings forth new and
significant reliability challenges. Ever-increasing process variability effects and transistor …