In recent years, the advancements in specialized hardware architectures have supported the
industry and the research community to address the computation power needed for more …

Field Programmable Gate Arrays (FPGAs) are spatial architectures with a heterogeneous
reconfigurable fabric. They are state-of-the-art for prototy**, telecommunications …

We present SonicBOOM, the third generation of the Berkeley Outof-Order Machine (BOOM).
SonicBOOM is an open-source RTL implementation of a RISC-V superscalar out-of-order …

DNN accelerators are often developed and evaluated in isolation without considering the
cross-stack, system-level effects in real-world environments. This makes it difficult to …

While research has shown that the agile chip design methodology is promising to sustain
the scaling of computing performance in a more efficient way, it is still of limited usage in …

ESP is an open-source research platform for heterogeneous SoC design. The platform
combines a modular tile-based architecture with a variety of application-oriented flows for …

The microarchitecture design of a processor has been increasingly difficult due to the large
design space and time-consuming verification flow. Previously, researchers rely on prior …

Tensor computations overwhelm traditional general-purpose computing devices due to the
large amounts of data and operations of the computations. They call for a holistic solution …

Recent research has shown that hardware fuzzers can effectively detect security
vulnerabilities in modern processors. However, existing hardware fuzzers do not fuzz well …

Serialization frameworks are a fundamental component of scale-out systems, but introduce
significant compute overheads. However, they are amenable to acceleration with …