An optimized RGA supporting selective undo for collaborative text editing systems
X Lv, F He, W Cai, Y Cheng - Journal of Parallel and Distributed Computing, 2019 - Elsevier
Collaboration plays a key role in distributed applications. As a fundamental vehicle for
collaboration, collaborative text editing systems have been an important field within CSCW …
collaboration, collaborative text editing systems have been an important field within CSCW …
Trends in shared memory multiprocessing
Current application and technology trends are causing researchers and developers to revisit
shared memory multiprocessing. The authors look at what is needed to maintain growth …
shared memory multiprocessing. The authors look at what is needed to maintain growth …
The architecture of the HP Superdome shared-memory multiprocessor
G Gostin, JF Collard, K Collins - Proceedings of the 19th annual …, 2005 - dl.acm.org
This paper offers an overview of the HP Superdome shared memory multiprocessor, along
with a detailed description of the cache coherence implementation.(An early and limited …
with a detailed description of the cache coherence implementation.(An early and limited …
An architecture for high-performance scalable shared-memory multiprocessors exploiting on-chip integration
Recent technology improvements allow multiprocessor designers to put some key
components inside the processor chip, such as the memory controller, the coherence …
components inside the processor chip, such as the memory controller, the coherence …
Algorithms and framework for energy efficient parallel stream computing on many-core architectures
N Melot - 2016 - diva-portal.org
The rise of many-core processor architectures in the market answers to a constantly growing
need of processing power to solve more and more challenging problems such as the ones …
need of processing power to solve more and more challenging problems such as the ones …
[PDF][PDF] A cache coherence protocol for the bidirectional ring based multiprocessor
Most ring based multiprocessors built in the past have been based on unidirectional rings.
Recently, bidirectional ring networks have been studied as better alternative for distributed …
Recently, bidirectional ring networks have been studied as better alternative for distributed …
Reducing the latency of L2 misses in shared-memory multiprocessors through on-chip directory integration
Recent technology improvements allow multiprocessor designers to put some key
components inside the processor chip, such as the memory controller and the network …
components inside the processor chip, such as the memory controller and the network …
Assessment of Cache Coherence Protocols in Shared-memory Multiprocessors
A Grbić - 2003 - croris.hr
Sažetak Chapter 2 discusses cache coherence protocols in the context of distributed shared-
memory multiprocessors. Next, a description of the NUMAchine cache coherence protocol …
memory multiprocessors. Next, a description of the NUMAchine cache coherence protocol …
[PDF][PDF] Techniques to Improve the Performance of Cache Memory for Multi-Core Processors
N Chaturvedi - 2015 - dspace.bits-pilani.ac.in
Performance gap between the speed of Processor and memory is continuously increasing
with advent of every new technology. Compared to traditional super-scalars, Chip …
with advent of every new technology. Compared to traditional super-scalars, Chip …
[PDF][PDF] Efficient and Scalable Cache Coherence for Many-Core Chip Multiprocessors
AR Bardisa - Universidad De Murcia, 2009 - webs.um.es
The huge number of transistors that are currently offered in a single die has made major
microprocessor vendors shift towards multi-core architectures in which several processor …
microprocessor vendors shift towards multi-core architectures in which several processor …