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A survey of architectural techniques for improving cache power efficiency
S Mittal - Sustainable Computing: Informatics and Systems, 2014 - Elsevier
Modern processors are using increasingly larger sized on-chip caches. Also, with each
CMOS technology generation, there has been a significant increase in their leakage energy …
CMOS technology generation, there has been a significant increase in their leakage energy …
Saliency detection via cellular automata
In this paper, we introduce Cellular Automata--a dynamic evolution model to intuitively
detect the salient object. First, we construct a background-based map using color and space …
detect the salient object. First, we construct a background-based map using color and space …
Leakage current: Moore's law meets static power
Off-state leakage is static power, current that leaks through transistors even when they are
turned off. The other source of power dissipation in today's microprocessors, dynamic power …
turned off. The other source of power dissipation in today's microprocessors, dynamic power …
[КНИГА][B] Memory systems: cache, DRAM, disk
B Jacob, D Wang, S Ng - 2010 - books.google.com
Is your memory hierarchy stop** your microprocessor from performing at the high level it
should be? Memory Systems: Cache, DRAM, Disk shows you how to resolve this problem …
should be? Memory Systems: Cache, DRAM, Disk shows you how to resolve this problem …
Drowsy caches: simple techniques for reducing leakage power
On-chip caches represent a sizable fraction of the total power consumption of
microprocessors. Although large caches can significantly improve performance, they have …
microprocessors. Although large caches can significantly improve performance, they have …
Cache decay: Exploiting generational behavior to reduce cache leakage power
Power dissipation is increasingly important in CPUs ranging from those intended for mobile
use, all the way up to high-performance processors for high-end servers. While the bulk of …
use, all the way up to high-performance processors for high-end servers. While the bulk of …
Microarchitectural techniques for power gating of execution units
Leakage power is a major concern in current and future microprocessor designs. In this
paper, we explore the potential of architectural techniques to reduce leakage through power …
paper, we explore the potential of architectural techniques to reduce leakage through power …
A static power model for architects
JA Butts, GS Sohi - Proceedings of the 33rd annual ACM/IEEE …, 2000 - dl.acm.org
Static power dissipation due to transistor leakage constitutes an increasing fraction of the
total power in modern semiconductor technologies. Current technology trends indicate that …
total power in modern semiconductor technologies. Current technology trends indicate that …
LECTOR: a technique for leakage reduction in CMOS circuits
N Hanchate, N Ranganathan - IEEE transactions on very large …, 2004 - ieeexplore.ieee.org
In CMOS circuits, the reduction of the threshold voltage due to voltage scaling leads to
increase in subthreshold leakage current and hence static power dissipation. We propose a …
increase in subthreshold leakage current and hence static power dissipation. We propose a …
[КНИГА][B] Computer architecture techniques for power-efficiency
S Kaxiras, M Martonosi - 2008 - books.google.com
In the last few years, power dissipation has become an important design constraint, on par
with performance, in the design of new computer systems. Whereas in the past, the primary …
with performance, in the design of new computer systems. Whereas in the past, the primary …