LLR-based successive cancellation list decoding of polar codes
We show that successive cancellation list decoding can be formulated exclusively using log-
likelihood ratios. In addition to numerical stability, the log-likelihood ratio based formulation …
likelihood ratios. In addition to numerical stability, the log-likelihood ratio based formulation …
Hardware architecture for list successive cancellation decoding of polar codes
This brief presents a hardware architecture and algorithmic improvements for list successive
cancellation (SC) decoding of polar codes. More specifically, we show how to completely …
cancellation (SC) decoding of polar codes. More specifically, we show how to completely …
Mpim: Multi-purpose in-memory processing using configurable resistive memory
Running Internet of Things applications on general purpose processors results in a large
energy and performance overhead, due to the high cost of data movement. Processing in …
energy and performance overhead, due to the high cost of data movement. Processing in …
Trellis-based extended min-sum algorithm for non-binary LDPC codes and its hardware structure
In this paper, we present an improvement and a new implementation of a simplified
decoding algorithm for non-binary low density parity-check codes (NB-LDPC) in Galois …
decoding algorithm for non-binary low density parity-check codes (NB-LDPC) in Galois …
VLSI implementation of fully parallel LTE turbo decoders
Turbo codes facilitate near-capacity transmission throughputs by achieving a reliable
iterative forward error correction. However, owing to the serial data dependence imposed by …
iterative forward error correction. However, owing to the serial data dependence imposed by …
[LIVRE][B] VLSI architectures for modern error-correcting codes
X Zhang - 2016 - api.taylorfrancis.com
Error-correcting codes are ubiquitous. They are adopted in almost every modern digital
communication and storage system, such as wireless communications, optical …
communication and storage system, such as wireless communications, optical …
A low-latency list successive-cancellation decoding implementation for polar codes
Due to their provably capacity-achieving performance, polar codes have attracted a lot of
research interest recently. For a good error-correcting performance, list successive …
research interest recently. For a good error-correcting performance, list successive …
High-throughput LDPC-decoder architecture using efficient comparison techniques & dynamic multi-frame processing schedule
This paper presents architecture of block-level-parallel layered decoder for irregular LDPC
code. It can be reconfigured to support various block lengths and code rates of IEEE 802.11 …
code. It can be reconfigured to support various block lengths and code rates of IEEE 802.11 …
On metric sorting for successive cancellation list decoding of polar codes
We focus on the metric sorter unit of successive cancellation list decoders for polar codes,
which lies on the critical path in all current hardware implementations of the decoder. We …
which lies on the critical path in all current hardware implementations of the decoder. We …
Low-complexity tree architecture for finding the first two minima
This brief presents an area-efficient tree architecture for finding the first two minima as well
as the index of the first minimum, which is essential in the design of a low-density parity …
as the index of the first minimum, which is essential in the design of a low-density parity …