Analytical modelling and sensitivity analysis of Gallium Nitride-Gate Material and, dielectric engineered-Schottky nano-wire fet (GaN-GME-DE-SNW-fet) based label …

S Sharma, V Nath, SS Deswal, RS Gupta - Microelectronics Journal, 2022 - Elsevier
An analytical model of nanogap embedded Gallium Nitride Gate-Material and Dielectric
Engineered-Schottky Nano-Wire Field Effect Transistor (GaN-GME-DE-SNW-FET) for …

Dual metal Schottky barrier asymmetric gate stack cylindrical gate all around (DM-SB-ASMGS-CGAA) MOSFET for improved analog performance for high frequency …

S Nandy, S Srivastava, S Rewari, V Nath… - Microsystem …, 2019 - Springer
In this paper dual metal Schottky barrier asymmetric gate stack cylindrical gate all around
(DM-SB-ASMGS-CGAA) MOSFET is analyzed for improvement in analog performance for …

Analytical modeling of spacer-engineered reconfigurable silicon nanowire Schottky barrier transistor for biosensing applications

V Thakur, A Kumar, S Kale - Micro and Nanostructures, 2024 - Elsevier
In this work, we present a comprehensive analytical model for the Spacer-Engineered
Reconfigurable Silicon Nanowire Schottky Barrier Transistor (SE R–Si NW SBT) for …

Design and performance analysis of GAA Schottky barrier-gate stack-do**less nanowire FET for phosphine gas detection

A Raman, D Kakkar, M Bansal, N Kumar - Applied Physics A, 2019 - Springer
This paper proposed a Gate-All-Around (GAA) Schottky Barrier (SB)-Gate Stack (GS)-based
Do**less Cylindrical Nanowire Field-Effect Transistor (SB-GS-DNWFET) for the …

2-D analytical modeling for electrostatic potential and threshold voltage of a dual work function gate Schottky barrier MOSFET

P Kumar, B Bhowmick - Journal of Computational Electronics, 2017 - Springer
A two-dimensional analytical model for the surface potential and threshold voltage of a dual
work function Schottky barrier (SB) MOSFET is presented. The developed model considers …

A physics‐based threshold voltage model for hetero‐dielectric dual material gate Schottky barrier MOSFET

P Kumar, B Bhowmick - International Journal of Numerical …, 2018 - Wiley Online Library
This paper presents the analytical model of threshold voltage for hetero‐dielectric dual
material gate Schottky barrier (SB) metal oxide semiconductor field effect transistor …

2D analytical model for surface potential based electric field and impact of wok function in DMG SB MOSFET

P Kumar, B Bhowmick - Superlattices and Microstructures, 2017 - Elsevier
In this paper an analytical surface potential model of a dual material gate (DMG) Schottky
Barrier (SB) metal-oxide-semiconductor field effect transistor (MOSFET) is explored. The …

Modeling and Simulation Characteristics of a Highly-Sensitive Stack-Engineered Junctionless Accumulation Nanowire FET for PH3 Gas Detector

S Sharma, A Goel, R Sonam, SS Deswal… - ECS Journal of Solid …, 2024 - iopscience.iop.org
In this manuscript, a Stack Engineered Junctionless Accumulation Nanowire FET (SE-JAM-
NW FET) has been proposed for low-power and high sensitivity phosphine (PH 3) gas …

Performance Assessments of Gate Engineered Do**less Schottky Tunnel MOSFET in Presence of Interfacial Trap Charges

A Som, SK Jana - Silicon, 2023 - Springer
The most notable accumulation of trap charges occurs on the oxide/semiconductor interface
of MOS devices and it degrades the device's performance and reliability. In this literature, we …

Design of Low Power Analog/RF Signal Processing Circuits Using 22 nm Silicon-on-Insulator Schottky Barrier Nano-Wire MOSFET

J Kumar, AN Mahajan, SS Deswal… - … Journal of High …, 2024 - World Scientific
The gate-all-around (GAA) silicon-on-insulator (SOI) Schottky barrier (SB) nano-wire (NW)
MOSFET was recently proposed for low-power and high-frequency analog and radio …