Simulation of substrate coupling for mobile communications SoC–A 20 GHz VCO case study

S Karipidis, A Voulkidou, A Michailidis… - AEU-International Journal …, 2023 - Elsevier
An innovative substrate coupling simulation methodology with on-the-fly extraction and
validation of CMOS substrate parasitic elements, combining boundary element method …

[BUKU][B] 3-D ICS as a platform for heterogeneous systems integration

B Vaisband - 2017 - search.proquest.com
In addition to increased functionality, modern applications are also often highly
heterogeneous. A large variety of emerging technologies, materials, and processes are …

Figures-of-merit to evaluate the significance of switching noise in analog circuits

Z Gan, E Salman, M Stanaćević - IEEE Transactions on Very …, 2015 - ieeexplore.ieee.org
An analysis flow is proposed to determine the significance of induced (switching) noise in
analog circuits. The proposed flow is exemplified through two commonly used amplifier …

Harmonic Estimation and Comparative Analysis of Ultra-High Speed Flip-Flop and Latch Topologies for Low Power and High Performance Future Generation Micro …

MI Khan - ACM Transactions on Design Automation of Electronic …, 2023 - dl.acm.org
This paper presents estimation and analysis of the higher order harmonics, power features,
and real performance of flip-flop and master-slave latch topologies. This research article …

Analysis of harmonic contents of switching waveforms emitted by the ultra high speed digital CMOS integrated circuits for use in future micro/nano systems …

MI Khan, R Shoukat, K Mukherjee, H Dong - Microsystem Technologies, 2018 - Springer
In this paper we outline the influence of transistor model quality and input signal on the
estimates of higher order harmonic contents of switching waveforms emitted by the high …

Frequency-independent warning detection sequential for dynamic voltage and frequency scaling in ASICs

BP Das, H Onodera - IEEE Transactions on Very Large Scale …, 2014 - ieeexplore.ieee.org
In this paper, a metastability immune warning flip-flop (FF) is proposed, which consists of an
edge detector, a warning window generator, and a warning detector along with a traditional …

Fractional-Order 2 × n RLC Circuit Network

R Zhou, D Chen, HHC Iu - Journal of Circuits, Systems and …, 2015 - World Scientific
This paper introduces new fundamentals of the 2× n RLC circuit network in the fractional-
order domain. First, we derive the three general formulae of the equivalent impedances of …

Noise coupling models in heterogeneous 3-D ICs

B Vaisband, EG Friedman - IEEE Transactions on Very Large …, 2016 - ieeexplore.ieee.org
Models of coupling noise from an aggressor module to a victim module by way of through
silicon vias (TSVs) within heterogeneous 3-D integrated circuits (ICs) are presented in this …

[HTML][HTML] Estimation and analysis of higher-order harmonics in advanced integrated circuits to implement noise-free future-generation micro-and …

MI Khan, AS Alshammari, BM Alshammari, AA Alzamil - Micromachines, 2021 - mdpi.com
This work deals with the analysis of spectrum generation from advanced integrated circuits
in order to better understand how to suppress the generation of high harmonics, especially …

Theoritical and experimental study of magnetic sensors for near-field emission measurement: Application to design and integration in power printed board circuit

G Viné, JM Dienot, PE Vidal - 2017 International Symposium on …, 2017 - ieeexplore.ieee.org
For electromagnetic interaction analysis in power electronics, the study and the design of
Near-Field integrated magnetic antennas are presented. An antenna model is developed …