A doubled transistor latch common-mode insensitive rail-to-rail regenerative comparator for low supply voltage applications

H Pahlavanzadeh, MA Karami - AEU-International Journal of Electronics …, 2023 - Elsevier
This paper presents a high-speed common-mode insensitive two-stage regenerative
comparator designed for low supply voltage applications. The proposed comparator features …

A wide tuning range CMOS differential ring VCO using an active inductor for wireless applications

M Alijani, M Javanmardi… - International Journal of …, 2024 - Wiley Online Library
A differential ring voltage‐controlled oscillator (DRVCO) is proposed in this paper as one of
the critical blocks in communication systems. It consists of four stages of delay cells …

A common-mode insensitive thyristor-based latch regenerative comparator for low supply voltage applications

H Pahlavanzadeh, R Navabi, S Iesakhani - Microelectronics Journal, 2024 - Elsevier
Presented in this article is a new two-stage rail-to-rail regenerative comparator circuit
designed for low supply voltage applications. This work introduces a thyristor-based latch for …

[HTML][HTML] A hybrid energy-efficient, area-efficient, low-complexity switching scheme in SAR ADC for biosensor applications

Y Hu, C Chen, Q Huang, L Hu, B Tang, M Hu, B Yuan… - Micromachines, 2023 - mdpi.com
A hybrid energy-efficient, area-efficient, low-complexity switching scheme in SAR ADC for
biosensor applications is proposed. This scheme is a combination of the monotonic …

A 9-10-Bit Adjustable and Energy-Efficient Switching Scheme for Successive Approximation Register Analog-to-Digital Converter with One Least Significant Bit …

Y Hu, C Chen, L Hu, Q Huang, B Tang, M Hu, B Yuan… - Sensors, 2024 - mdpi.com
A 9-10-bit adjustable and energy-efficient switching scheme for SAR ADC with one-LSB
common-mode voltage variation is proposed. Based on capacitor-splitting technology and …

An 80‐MS/s 60.9‐dB SNDR Fully Differential Ring Amplifier‐Based SAR‐Assisted Pipelined ADC With Dual Redundancy in 65‐nm CMOS

H Chen, M Jian, Z Wang, H **e… - International Journal of …, 2025 - Wiley Online Library
This paper presents a single‐channel, 12‐bit, 80‐MS/s SAR‐assisted pipelined ADC. A ring
amplifier is used as the inter‐stage residue amplifier, employing dynamic biasing to …

A Successive Approximate Angle Track Converter for Sinusoidal Encoders

X Lai, B Wang, Z Niu - International Journal of Circuit Theory …, 2024 - Wiley Online Library
This paper presents a novel angle track converter for sinusoidal encoders. These encoders
provide electronic signals in which the position is encoded in sinusoidal form. This work …

High-Speed 16-Bit SAR-ADC Design at 500 MS/s with Variable Body Biasing for Sub-Threshold Leakage Reduction

T Singh, SL Tripathi, V Kumar - Journal of Integrated Circuits and Systems, 2024 - jics.org.br
In this study, a high-performance 16-bit, 500 MS/s successive approximation register analog-
to-digital con-verter (SAR-ADC) with variable body biasing (VBB) for re-ducing sub …

A rail‐to‐rail regenerative comparator with inverse inverter pre‐amplifier for low supply voltage applications

H Pahlavanzadeh, S Iesakhani… - Electronics Letters, 2023 - Wiley Online Library
In this letter, a new rail‐to‐rail two‐stage regenerative comparator for low supply voltage
applications is presented. A rail‐to‐rail operation is achieved by utilizing an inverse inverter …

A Differential Ring VCO with a New Structure for the Pre-Charger and Pre-Discharger Method

VK Viaee, M Alijani… - 2024 6th Iranian …, 2024 - ieeexplore.ieee.org
This paper proposes a high-performance, low-power, and wide-band Ring Voltage
Controlled Oscillator (RVCO) with a differential topology. Utilizing a dual-delay path method …