Spin-transfer torque devices for logic and memory: Prospects and perspectives

X Fong, Y Kim, K Yogendra, D Fan… - … on Computer-Aided …, 2015 - ieeexplore.ieee.org
As CMOS technology begins to face significant scaling challenges, considerable research
efforts are being directed to investigate alternative device technologies that can serve as a …

A survey of architectural approaches for managing embedded DRAM and non-volatile on-chip caches

S Mittal, JS Vetter, D Li - IEEE Transactions on Parallel and …, 2014 - ieeexplore.ieee.org
Recent trends of CMOS scaling and increasing number of on-chip cores have led to a large
increase in the size of on-chip caches. Since SRAM has low density and consumes large …

Magnetic racetrack memory: From physics to the cusp of applications within a decade

R Bläsing, AA Khan, PC Filippou, C Garg… - Proceedings of the …, 2020 - ieeexplore.ieee.org
Racetrack memory (RTM) is a novel spintronic memory-storage technology that has the
potential to overcome fundamental constraints of existing memory and storage devices. It is …

Spin-transfer torque memories: Devices, circuits, and systems

X Fong, Y Kim, R Venkatesan, SH Choday… - Proceedings of the …, 2016 - ieeexplore.ieee.org
Spin-transfer torque magnetic memory (STT-MRAM) has gained significant research interest
due to its nonvolatility and zero standby leakage, near unlimited endurance, excellent …

Coding for racetrack memories

YM Chee, HM Kiah, A Vardy… - IEEE Transactions on …, 2018 - ieeexplore.ieee.org
Racetrack memory is a new technology, which utilizes magnetic domains along a
nanoscopic wire in order to obtain extremely high storage density. In racetrack memory …

Hi-fi playback: Tolerating position errors in shift operations of racetrack memory

C Zhang, G Sun, X Zhang, W Zhang, W Zhao… - Proceedings of the …, 2015 - dl.acm.org
Racetrack memory is an emerging non-volatile memory based on spintronic domain wall
technology. It can achieve ultra-high storage density. Also, its read/write speed is …

QuickRecall A HW/SW Approach for Computing across Power Cycles in Transiently Powered Computers

H Jayakumar, A Raha, WS Lee… - ACM Journal on …, 2015 - dl.acm.org
Transiently Powered Computers (TPCs) are a new class of batteryless embedded systems
that depend solely on energy harvested from external sources for performing computations …

Cross-layer racetrack memory design for ultra high density and low power consumption

Z Sun, W Wu, H Li - Proceedings of the 50th Annual Design Automation …, 2013 - dl.acm.org
The racetrack memory technology utilizes magnetic domains along a nanoscopic wire to
obtain ultra-high data storage density. The recent success in the planar racetrack nanowire …

Dwm-tapestri-an energy efficient all-spin cache using domain wall shift based writes

R Venkatesan, M Sharad, K Roy… - … Design, Automation & …, 2013 - ieeexplore.ieee.org
Spin-based memories are promising candidates for future on-chip memories due to their
high density, non-volatility, and very low leakage. However, the high energy and latency of …

SPINDLE: SPINtronic deep learning engine for large-scale neuromorphic computing

SG Ramasubramanian, R Venkatesan… - Proceedings of the …, 2014 - dl.acm.org
Deep Learning Networks (DLNs) are bio-inspired large-scale neural networks that are
widely used in emerging vision, analytics, and search applications. The high computation …